fixed schematic, routed foo
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dvi-sniffer.net
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11
fpga.sch
11
fpga.sch
@ -2052,4 +2052,15 @@ F 3 "" H 1800 7250 50 0000 C CNN
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1 0 0 -1
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$EndComp
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Connection ~ 1800 7250
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$Comp
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L +V_IO #PWR?
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U 1 1 584F1E0B
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P 1900 3150
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F 0 "#PWR?" H 1900 3000 50 0001 C CNN
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F 1 "+V_IO" H 1915 3323 50 0000 C CNN
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F 2 "" H 1900 3150 50 0000 C CNN
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F 3 "" H 1900 3150 50 0000 C CNN
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1 1900 3150
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1 0 0 -1
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$EndComp
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$EndSCHEMATC
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