pcb/dvi-fpga
1
0
Fork 0
Code Issues Pull Requests Releases Wiki Activity

added 3d model to footprint of power coil

Browse Source
This commit is contained in:
Mario Hüttel 2017-01-10 14:04:53 +01:00
parent 41e33910d6
commit 2bd138ba01
1 changed files with 29 additions and 24 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

53
dvi-sniffer.kicad_pcb
View File

@ -1,9 +1,9 @@
(kicad_pcb (version 20160815) (host pcbnew "(2016-12-16 revision f631ae27b)-master")
(kicad_pcb (version 20160815) (host pcbnew "(2016-12-22 revision d365dc590)-master")
(general
(links 477)
(no_connects 0)
(area 18.088499 19.924999 120.075001 120.075001)
(area 19.924999 19.924999 120.075001 120.075001)
(thickness 1.6)
(drawings 6)
(tracks 5001)
@ -39,7 +39,7 @@
)
(setup
(last_trace_width 0.4)
(last_trace_width 0.2)
(user_trace_width 0.15)
(user_trace_width 0.2)
(user_trace_width 0.4)
@ -584,6 +584,32 @@
(add_net "Net-(X501-Pad8)")
)
(module smd:LPISM-13x9.55 (layer F.Cu) (tedit 5874DABA) (tstamp 5872988D)
(at 87.69 28.885 180)
(path /5839A46D/5839C78F)
(fp_text reference L202 (at -5.7 -0.8 270) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value 33u (at 5.9 0 270) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start -4.8 -6.5) (end -2.9 -6.5) (layer F.SilkS) (width 0.15))
(fp_line (start -4.8 6.5) (end -4.8 -6.5) (layer F.SilkS) (width 0.15))
(fp_line (start -2.9 6.5) (end -4.8 6.5) (layer F.SilkS) (width 0.15))
(fp_line (start 4.8 -6.5) (end 2.9 -6.5) (layer F.SilkS) (width 0.15))
(fp_line (start 4.8 6.5) (end 4.8 -6.5) (layer F.SilkS) (width 0.15))
(fp_line (start 2.9 6.5) (end 4.8 6.5) (layer F.SilkS) (width 0.15))
(pad 2 smd rect (at 0 -5.15 180) (size 3 3.6) (layers F.Cu F.Paste F.Mask)
(net 5 +3V3))
(pad 1 smd rect (at 0 5.15 180) (size 3 3.6) (layers F.Cu F.Paste F.Mask)
(net 9 "Net-(D201-Pad1)"))
(model ${KISYS3DMOD}/smd.shapes3d/LPISM-13x9.55.x3d
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module Capacitors_Tantalum_SMD:Tantalum_Case-D_EIA-7343-31_Hand (layer F.Cu) (tedit 57B6E980) (tstamp 586EAA66)
(at 86.91 39.545)
(descr "Tantalum capacitor, Case D, EIA 7343-31, 7.3x4.3x2.8mm, Hand soldering footprint")
@ -7278,27 +7304,6 @@
)
)
(module smd:LPISM-13x9.55 (layer F.Cu) (tedit 587292F5) (tstamp 5872988D)
(at 87.69 28.885 180)
(path /5839A46D/5839C78F)
(fp_text reference L202 (at 6.14 2.06 270) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value 33u (at 5.9 0 270) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start 2.9 6.5) (end 4.8 6.5) (layer F.SilkS) (width 0.15))
(fp_line (start 4.8 6.5) (end 4.8 -6.5) (layer F.SilkS) (width 0.15))
(fp_line (start 4.8 -6.5) (end 2.9 -6.5) (layer F.SilkS) (width 0.15))
(fp_line (start -2.9 6.5) (end -4.8 6.5) (layer F.SilkS) (width 0.15))
(fp_line (start -4.8 6.5) (end -4.8 -6.5) (layer F.SilkS) (width 0.15))
(fp_line (start -4.8 -6.5) (end -2.9 -6.5) (layer F.SilkS) (width 0.15))
(pad 1 smd rect (at 0 5.15 180) (size 3 3.6) (layers F.Cu F.Paste F.Mask)
(net 9 "Net-(D201-Pad1)"))
(pad 2 smd rect (at 0 -5.15 180) (size 3 3.6) (layers F.Cu F.Paste F.Mask)
(net 5 +3V3))
)
(gr_text "V1.2\n" (at 77.29 105.905) (layer F.Mask)
(effects (font (size 1.5 1.5) (thickness 0.3)))
)