added v_io symbol, video_in bus

2016-11-27 13:43:11 +01:00 · 2016-11-27 13:43:11 +01:00 · e10131b00a
commit e10131b00a
parent e5a045aae8
7 changed files with 754 additions and 50 deletions
--- a/dvi-sniffer-cache.lib
+++ b/dvi-sniffer-cache.lib
@ -47,6 +47,21 @@ X +3V3 1 0 0 0 U 50 50 1 1 W N
 ENDDRAW
 ENDDEF
 #
+# +V_IO
+#
+DEF +V_IO #PWR 0 0 Y Y 1 F P
+F0 "#PWR" 0 -150 50 H I C CNN
+F1 "+V_IO" 0 140 50 H V C CNN
+F2 "" 0 0 50 H V C CNN
+F3 "" 0 0 50 H V C CNN
+DRAW
+P 2 0 1 0 -30 50 0 100 N
+P 2 0 1 0 0 0 0 100 N
+P 2 0 1 0 0 100 30 50 N
+X +V_IO 1 0 0 0 U 50 50 1 1 W N
+ENDDRAW
+ENDDEF
+#
 # AP1117
 #
 DEF AP1117 U 0 30 Y Y 1 F N
@ -279,13 +294,13 @@ S 0 1400 1000 0 5 1 0 f
 X B4_DIFFIO_B16n 60 -200 950 200 R 50 50 5 1 B
 X B4_DIFFIO_B21p 70 -200 250 200 R 50 50 5 1 B
 X B4_DIFFIO_B21n 71 -200 150 200 R 50 50 5 1 B
-X VCCIO4 62 1250 1250 200 L 50 50 5 1 W
+X VCCIO4 62 1200 1250 200 L 50 50 5 1 W
 X B4_DIFFIO_B22p 72 -200 50 200 R 50 50 5 1 B
 X B4_DIFFIO_B12p 54 -200 1350 200 R 50 50 5 1 B
 X B4_IO 64 -200 850 200 R 50 50 5 1 B
 X B4_DIFFIO_B12n 55 -200 1250 200 R 50 50 5 1 B
 X B4_VREFB4N0 65 -200 750 200 R 50 50 5 1 B
-X VCCIO4 56 1250 1350 200 L 50 50 5 1 W
+X VCCIO4 56 1200 1350 200 L 50 50 5 1 W
 X B4_RUP2 66 -200 650 200 R 50 50 5 1 B
 X B4_RDN2 67 -200 550 200 R 50 50 5 1 B
 X B4_DIFFIO_B15p 58 -200 1150 200 R 50 50 5 1 B
--- a/dvi-sniffer.pro
+++ b/dvi-sniffer.pro
@ -1,4 +1,4 @@
-update=Sat 26 Nov 2016 03:28:09 PM CET
+update=Sun 27 Nov 2016 01:11:18 PM CET
 version=1
 last_client=kicad
 [pcbnew]
@ -62,3 +62,4 @@ LibName30=ti
 LibName31=altera
 LibName32=regulators
 LibName33=pmic
+LibName34=powersym
--- a/dvi-sniffer.sch
+++ b/dvi-sniffer.sch
@ -32,6 +32,7 @@ LIBS:ti
 LIBS:altera
 LIBS:regulators
 LIBS:pmic
+LIBS:powersym
 LIBS:dvi-sniffer-cache
 EELAYER 26 0
 EELAYER END
@ -86,7 +87,7 @@ $EndComp
 Wire Wire Line
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 $Sheet
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 U 583A26B6
 F0 "fpga" 60
 F1 "fpga.sch" 60
--- a/fpga.sch
+++ b/fpga.sch
@ -32,6 +32,7 @@ LIBS:ti
 LIBS:altera
 LIBS:regulators
 LIBS:pmic
+LIBS:powersym
 LIBS:dvi-sniffer-cache
 EELAYER 26 0
 EELAYER END
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 NoConn ~ 1150 4000
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+F 0 "#PWR?" H 8150 5100 50  0001 C CNN
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+F 2 "" H 8150 5350 50  0000 C CNN
+F 3 "" H 8150 5350 50  0000 C CNN
+	1    8150 5350
+	1    0    0    -1  
+$EndComp
+Wire Wire Line
+	8150 5350 8150 5300
+Wire Wire Line
+	7850 4950 8150 4950
+Wire Wire Line
+	8150 4900 8150 5000
+Connection ~ 8150 4950
+$Comp
+L +3V3 #PWR?
+U 1 1 583B64F2
+P 8100 3550
+F 0 "#PWR?" H 8100 3400 50  0001 C CNN
+F 1 "+3V3" H 8115 3723 50  0000 C CNN
+F 2 "" H 8100 3550 50  0000 C CNN
+F 3 "" H 8100 3550 50  0000 C CNN
+	1    8100 3550
+	1    0    0    -1  
+$EndComp
+$Comp
+L C C?
+U 1 1 583B64F8
+P 8100 3800
+F 0 "C?" H 8215 3846 50  0000 L CNN
+F 1 "100n" H 8215 3755 50  0000 L CNN
+F 2 "" H 8138 3650 50  0000 C CNN
+F 3 "" H 8100 3800 50  0000 C CNN
+	1    8100 3800
+	1    0    0    -1  
+$EndComp
+$Comp
+L GND #PWR?
+U 1 1 583B64FE
+P 8100 4000
+F 0 "#PWR?" H 8100 3750 50  0001 C CNN
+F 1 "GND" H 8105 3827 50  0000 C CNN
+F 2 "" H 8100 4000 50  0000 C CNN
+F 3 "" H 8100 4000 50  0000 C CNN
+	1    8100 4000
+	1    0    0    -1  
+$EndComp
+Wire Wire Line
+	8100 4000 8100 3950
+Wire Wire Line
+	8050 3600 8100 3600
+Wire Wire Line
+	8100 3550 8100 3650
+Connection ~ 8100 3600
+$Comp
+L C C?
+U 1 1 583B7355
+P 7950 5150
+F 0 "C?" H 8065 5196 50  0000 L CNN
+F 1 "100n" H 8065 5105 50  0000 L CNN
+F 2 "" H 7988 5000 50  0000 C CNN
+F 3 "" H 7950 5150 50  0000 C CNN
+	1    7950 5150
+	-1   0    0    -1  
+$EndComp
+Wire Wire Line
+	7950 5000 7950 4950
+Connection ~ 7950 4950
+Wire Wire Line
+	8150 5300 7950 5300
+Connection ~ 8150 5300
+Wire Wire Line
+	7850 4850 8050 4850
+Wire Wire Line
+	8050 4850 8050 4950
+Connection ~ 8050 4950
+$Comp
+L C C?
+U 1 1 583B7DED
+P 1000 2250
+F 0 "C?" H 1115 2296 50  0000 L CNN
+F 1 "100n" H 1115 2205 50  0000 L CNN
+F 2 "" H 1038 2100 50  0000 C CNN
+F 3 "" H 1000 2250 50  0000 C CNN
+	1    1000 2250
+	1    0    0    -1  
+$EndComp
+$Comp
+L GND #PWR?
+U 1 1 583B8291
+P 1000 2450
+F 0 "#PWR?" H 1000 2200 50  0001 C CNN
+F 1 "GND" H 1005 2277 50  0000 C CNN
+F 2 "" H 1000 2450 50  0000 C CNN
+F 3 "" H 1000 2450 50  0000 C CNN
+	1    1000 2450
+	1    0    0    -1  
+$EndComp
+Wire Wire Line
+	1000 2400 1000 2450
+Wire Wire Line
+	3950 2700 3850 2700
+Wire Wire Line
+	3850 2700 3850 2800
+Wire Wire Line
+	3850 2800 5800 2800
+Entry Wire Line
+	5800 2800 5900 2900
+Text Label 5550 2800 0    60   ~ 0
+CLKIN
+$Comp
+L +V_IO #PWR?
+U 1 1 583AD214
+P 8100 700
+F 0 "#PWR?" H 8100 550 50  0001 C CNN
+F 1 "+V_IO" H 8115 873 50  0000 C CNN
+F 2 "" H 8100 700 50  0000 C CNN
+F 3 "" H 8100 700 50  0000 C CNN
+	1    8100 700 
+	1    0    0    -1  
+$EndComp
+Text HLabel 4150 850  0    60   Input ~ 0
+VIDEO_IN
 $EndSCHEMATC
--- a/power.sch
+++ b/power.sch
@ -32,6 +32,7 @@ LIBS:ti
 LIBS:altera
 LIBS:regulators
 LIBS:pmic
+LIBS:powersym
 LIBS:dvi-sniffer-cache
 EELAYER 26 0
 EELAYER END
--- a/powersym.dcm
+++ b/powersym.dcm
@ -0,0 +1,11 @@
+EESchema-DOCLIB  Version 2.0
+#
+$CMP +3V3
+K POWER, PWR
+$ENDCMP
+#
+$CMP +V_IO
+K POWER, PWR
+$ENDCMP
+#
+#End Doc Library
--- a/powersym.lib
+++ b/powersym.lib
@ -0,0 +1,19 @@
+EESchema-LIBRARY Version 2.3
+#encoding utf-8
+#
+# +V_IO
+#
+DEF +V_IO #PWR 0 0 Y Y 1 F P
+F0 "#PWR" 0 -150 50 H I C CNN
+F1 "+V_IO" 0 140 50 H V C CNN
+F2 "" 0 0 50 H V C CNN
+F3 "" 0 0 50 H V C CNN
+DRAW
+P 2 0 1 0 -30 50 0 100 N
+P 2 0 1 0 0 0 0 100 N
+P 2 0 1 0 0 100 30 50 N
+X +V_IO 1 0 0 0 U 50 50 1 1 W N
+ENDDRAW
+ENDDEF
+#
+#End Library