2019-09-22 18:42:43 +02:00
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(kicad_pcb (version 20171130) (host pcbnew 5.1.4)
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(general
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(thickness 1.6)
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2019-10-02 14:12:33 +02:00
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(drawings 0)
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(tracks 0)
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2019-09-22 18:42:43 +02:00
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(zones 0)
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2019-10-02 14:12:33 +02:00
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(modules 0)
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(nets 1)
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2019-09-22 18:42:43 +02:00
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)
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(page A4)
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(layers
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(0 F.Cu signal)
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(31 B.Cu signal)
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(32 B.Adhes user)
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(33 F.Adhes user)
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(34 B.Paste user)
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(35 F.Paste user)
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(36 B.SilkS user)
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(37 F.SilkS user)
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(38 B.Mask user)
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(39 F.Mask user)
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(40 Dwgs.User user)
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(41 Cmts.User user)
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(42 Eco1.User user)
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(43 Eco2.User user)
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(44 Edge.Cuts user)
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(45 Margin user)
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(46 B.CrtYd user)
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(47 F.CrtYd user)
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(48 B.Fab user hide)
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(49 F.Fab user hide)
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)
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(setup
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(last_trace_width 0.25)
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(user_trace_width 0.3)
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(user_trace_width 0.4)
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(user_trace_width 0.6)
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(user_trace_width 1)
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(user_trace_width 2)
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(trace_clearance 0.2)
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(zone_clearance 0.25)
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(zone_45_only no)
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(trace_min 0.2)
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(via_size 0.5)
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(via_drill 0.3)
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(via_min_size 0.4)
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(via_min_drill 0.3)
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(user_via 0.9 0.5)
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(uvia_size 0.3)
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(uvia_drill 0.1)
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(uvias_allowed no)
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(uvia_min_size 0.2)
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(uvia_min_drill 0.1)
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(edge_width 0.05)
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(segment_width 0.2)
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(pcb_text_width 0.3)
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(pcb_text_size 1.5 1.5)
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(mod_edge_width 0.12)
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(mod_text_size 1 1)
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(mod_text_width 0.15)
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(pad_size 1.98 3.96)
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(pad_drill 1.32)
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(pad_to_mask_clearance 0.051)
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(solder_mask_min_width 0.25)
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(aux_axis_origin 13 13)
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(grid_origin 13 13)
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(visible_elements FFFFFF7F)
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(pcbplotparams
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(layerselection 0x010fc_ffffffff)
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(usegerberextensions false)
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(usegerberattributes false)
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(usegerberadvancedattributes false)
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(creategerberjobfile false)
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(excludeedgelayer true)
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(linewidth 0.100000)
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(plotframeref false)
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(viasonmask false)
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(mode 1)
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(useauxorigin false)
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(hpglpennumber 1)
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(hpglpenspeed 20)
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(hpglpendiameter 15.000000)
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(psnegative false)
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(psa4output false)
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(plotreference true)
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(plotvalue true)
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(plotinvisibletext false)
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(padsonsilk false)
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(subtractmaskfromsilk false)
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(outputformat 1)
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(mirror false)
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(drillshape 1)
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(scaleselection 1)
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(outputdirectory ""))
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)
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(net 0 "")
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(net_class Default "This is the default net class."
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(clearance 0.2)
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(trace_width 0.25)
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(via_dia 0.5)
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(via_drill 0.3)
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(uvia_dia 0.3)
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(uvia_drill 0.1)
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)
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(net_class HV ""
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(clearance 2)
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(trace_width 1)
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(via_dia 0.5)
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(via_drill 0.3)
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(uvia_dia 0.3)
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(uvia_drill 0.1)
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)
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)
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