Add I2C communication. Start writing DMX TX. Break generation already implemented
This commit is contained in:
parent
b118a010e3
commit
446a253936
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@ -3,3 +3,10 @@
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*.elf
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*.lss
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*.d
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*.jdebug
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*.jdebug.user
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# ClangD Ignopre files
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.cache/*
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compile_commands.json
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8
Makefile
8
Makefile
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@ -11,7 +11,9 @@ endif
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#Add Files and Folders below#########################################################
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CFILES = main.c setup/system_init.c startup/startup_stm32f0xx.c systick.c
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CFILES := main.c setup/system_init.c startup/startup_stm32f0xx.c systick.c
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CFILES += i2c.c
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CFILES += dmx.c
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ASFILES =
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INCLUDEPATH = -Iinclude -Iinclude/cmsis
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@ -35,11 +37,11 @@ OBJCOPY := $(CROSS_COMPILE)objcopy
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OBJDUMP := $(CROSS_COMPILE)objdump
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SIZE := $(CROSS_COMPILE)size
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LFLAGS = -mlittle-endian -mthumb -mcpu=cortex-m0 -mthumb-interwork
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LFLAGS = -mlittle-endian -mthumb -mcpu=cortex-m0
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LFLAGS += -mfloat-abi=soft --disable-newlib-supplied-syscalls -nostartfiles
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LFLAGS += -Tstartup/stm32f030.ld -Wl,-Map=$(mapfile).map -Wl,--gc-sections -Wl,--print-memory-usage -g
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CFLAGS = -c -fmessage-length=0 -mlittle-endian -mthumb -mcpu=cortex-m0 -mthumb-interwork
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CFLAGS = -c -fmessage-length=0 -mlittle-endian -mthumb -mcpu=cortex-m0
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CFLAGS += -mfloat-abi=soft -nostartfiles -Wall -g3 -O0
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####################################################################################
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@ -0,0 +1,134 @@
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#include "stm32f030x6.h"
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#include <dmx.h>
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#include <stdint.h>
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#include <stm32f0xx.h>
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#include <stdbool.h>
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#include <stm-periph/stm32-gpio-macros.h>
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static GPIO_TypeDef *dmx_tx_port;
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static uint8_t dmx_tx_pin;
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static uint32_t dmx_universe_length;
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static uint8_t *dmx_data_ptr;
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static uint16_t dmx_tx_break_len;
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static uint16_t dmx_tx_break_pause;
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enum dmx_tx_state {
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DMX_TX_OFF,
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DMX_TX_IDLE,
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DMX_TX_BREAK,
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DMX_TX_BREAK_PAUSE,
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DMX_TX_NULLBYTE,
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DMX_TX_DATA,
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};
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static volatile enum dmx_tx_state tx_state;
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/* USART1 TX is mapped on DMA Channel2 */
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static void dmx_break(bool break_enable)
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{
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uint32_t tmp;
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/* Force pin to low */
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dmx_tx_port->BSRR |= (1 << (dmx_tx_pin + 16));
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/* Change pin mode from alternate function (UART) to output and vice versa */
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tmp = dmx_tx_port->MODER;
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if (break_enable) {
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tmp &= MODER_DELETE(dmx_tx_pin);
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tmp |= OUTPUT(dmx_tx_pin);
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} else {
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tmp &= MODER_DELETE(dmx_tx_pin);
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tmp |= ALTFUNC(dmx_tx_pin);
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}
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dmx_tx_port->MODER = tmp;
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}
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void dmx_init(uint8_t *data, uint32_t universe_length, GPIO_TypeDef *tx_port, uint8_t tx_pin,
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uint16_t dmx_delay, uint16_t dmx_break_len, uint16_t break_pause)
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{
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dmx_tx_pin = tx_pin;
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dmx_tx_port = tx_port;
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dmx_data_ptr = data;
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dmx_tx_break_len = dmx_break_len;
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dmx_tx_break_pause = break_pause;
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/* Enable UART1 and TIM14 clock */
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RCC->APB2ENR |= RCC_APB2ENR_USART1EN;
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RCC->APB1ENR |= RCC_APB1ENR_TIM14EN;
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/* Enable DMA clock */
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RCC->AHBENR |= RCC_AHBENR_DMAEN;
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/* Set baudrate: 48MHz / 250k = 129 */
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USART1->BRR = 192u;
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/* Two stop bits */
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USART1->CR2 = USART_CR2_STOP_1;
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/* Transmitter enable, USART enable */
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USART1->CR1 = USART_CR1_TE | USART_CR1_UE;
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/* Configure TIM14 to count in 10 us steps */
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TIM14->PSC = 480u;
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/* Configure the reload value. Must be higher or equal to 200 */
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if (dmx_delay < 2000)
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dmx_delay = 2000;
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TIM14->ARR = dmx_delay - 1;
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/* Enable TIM14 interrupt on update */
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TIM14->DIER = TIM_DIER_UIE | TIM_DIER_CC1IE;
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NVIC_EnableIRQ(TIM14_IRQn);
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}
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void dmx_stream_start(void)
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{
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tx_state = DMX_TX_IDLE;
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TIM14->CR1 |= TIM_CR1_CEN;
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}
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void dmx_stream_stop(void)
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{
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tx_state = DMX_TX_OFF;
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TIM14->CR1 &= ~TIM_CR1_CEN;
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DMA1_Channel2->CCR = 0ul;
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__DSB();
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USART1->CR3 = 0ul;
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}
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void TIM14_IRQHandler(void)
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{
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/* Clear interrupt sources */
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TIM14->SR = 0;
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/* Start the break sequence if idle */
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switch (tx_state) {
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case DMX_TX_IDLE:
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tx_state = DMX_TX_BREAK;
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/* Disable the DMA transfer */
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USART1->CR3 = 0ul;
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TIM14->CCR1 = dmx_tx_break_len;
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/* Send break */
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dmx_break(true);
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break;
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case DMX_TX_BREAK:
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/* Stop break pulse */
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dmx_break(false);
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TIM14->CCR1 = dmx_tx_break_len + dmx_tx_break_pause;
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tx_state = DMX_TX_BREAK_PAUSE;
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break;
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case DMX_TX_BREAK_PAUSE:
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tx_state = DMX_TX_IDLE;
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break;
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default:
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break;
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}
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}
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@ -0,0 +1,138 @@
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#include "stm32f030x6.h"
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#include <i2c.h>
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#include <stdint.h>
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void i2c_init(void)
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{
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RCC->APB1ENR |= RCC_APB1ENR_I2C1EN;
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/* Use SYSCLK for I2C, because HSI (default) is disabled */
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RCC->CFGR3 |= RCC_CFGR3_I2C1SW;
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i2c_reset();
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/* Setup clocks */
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I2C1->TIMINGR = ((6 << 28) & I2C_TIMINGR_PRESC) | ((8 << 20) & I2C_TIMINGR_SCLDEL) |
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((8 << 16) & I2C_TIMINGR_SDADEL) | ((0x20 << 8) & I2C_TIMINGR_SCLH) |
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((0x20 << 0) & I2C_TIMINGR_SCLL);
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/* Peripheral enable */
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I2C1->CR1 = I2C_CR1_PE;
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}
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int i2c_write(uint8_t i2c_addr, const uint8_t *data, uint8_t len)
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{
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uint32_t isr;
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/* Clear stop flag */
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I2C1->ICR |= I2C_ICR_STOPCF;
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/* Setup len bytes for write transfer */
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I2C1->CR2 = I2C_CR2_AUTOEND | ((len << 16 ) & I2C_CR2_NBYTES) | (i2c_addr & 0xFE) | I2C_CR2_START;
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do {
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isr = I2C1->ISR;
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if (isr & I2C_ISR_NACKF) {
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/* NACK received */
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return -1;
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} else if (isr & I2C_ISR_TXIS) {
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/* I2C ready to get data to send */
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I2C1->TXDR = (uint32_t)*data;
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data++;
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len--;
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}
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} while (len > 0);
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/* All data transferred. Wait for automatically generated stop */
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while (!(I2C1->ISR & I2C_ISR_STOPF)) {
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if (I2C1->ISR & I2C_ISR_NACKF) {
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return -1;
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}
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}
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/* Clear stop flag */
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I2C1->ICR |= I2C_ICR_STOPCF;
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return 0;
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}
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int i2c_read(uint8_t i2c_addr, uint8_t command, uint8_t *data, uint8_t len)
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{
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int run;
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int err;
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uint32_t isr;
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if (!data || !len) {
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return -1000;
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}
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/* Clear stop flag */
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I2C1->ICR |= I2C_ICR_STOPCF;
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/* Setup len bytes for write transfer of command */
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I2C1->CR2 = ((1 << 16 ) & I2C_CR2_NBYTES) | (i2c_addr & 0xFE) | I2C_CR2_START;
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err = 0;
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run = 1;
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do {
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isr = I2C1->ISR;
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if (isr & I2C_ISR_NACKF) {
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err = 1;
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run = 0;
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} else if (isr & I2C_ISR_TXIS) {
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I2C1->TXDR = (uint32_t)command;
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run = 0;
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}
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} while (run);
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if (err) {
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return -1;
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}
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/* Wait for command to be transmitted */
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run = 1;
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err = 0;
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do {
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isr = I2C1->ISR;
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if (isr & I2C_ISR_NACKF) {
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err = 1;
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run = 0;
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} else if (isr & I2C_ISR_TC) {
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run = 0;
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}
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} while (run);
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if (err) {
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return -1;
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}
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/* Setup read request */
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I2C1->CR2 = I2C_CR2_AUTOEND | I2C_CR2_RD_WRN | ((len << 16 ) & I2C_CR2_NBYTES) | (i2c_addr & 0xFE) | I2C_CR2_START;
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while (len) {
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if (I2C1->ISR & I2C_ISR_RXNE) {
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*data = I2C1->RXDR;
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data++;
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len--;
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}
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}
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while (!(I2C1->ISR & I2C_ISR_STOPF)) {
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if (I2C1->ISR & I2C_ISR_NACKF) {
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return -1;
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}
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}
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/* Clear stop flag */
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I2C1->ICR |= I2C_ICR_STOPCF;
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return 0;
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}
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void i2c_reset(void)
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{
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I2C1->CR1 = 0;
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I2C1->CR2 = 0;
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}
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#ifndef _DMX_H_
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#define _DMX_H_
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#include <stdint.h>
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void dmx_init(uint8_t *data, uint32_t universe_length, GPIO_TypeDef *tx_port, uint8_t tx_pin,
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uint16_t dmx_delay, uint16_t dmx_break_len, uint16_t break_pause);
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void dmx_stream_start(void);
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void dmx_stream_stop(void);
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#endif /* _DMX_H_ */
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#ifndef _I2C_H_
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#define _I2C_H_
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#include <stdint.h>
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void i2c_init(void);
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void i2c_reset(void);
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int i2c_write(uint8_t i2c_addr, const uint8_t *data, uint8_t len);
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int i2c_read(uint8_t i2c_addr, uint8_t command, uint8_t *data, uint8_t len);
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#endif /* _I2C_H_ */
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55
main.c
55
main.c
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@ -1,6 +1,21 @@
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#include <i2c.h>
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#include <stdint.h>
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#include <stm32f0xx.h>
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#include <stm-periph/stm32-gpio-macros.h>
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#include <systick.h>
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#include <dmx.h>
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#define PCA9555_ADDR (0x40)
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#define PCA9555_REG_IN_PORT0 (0x0)
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#define PCA9555_REG_IN_PORT1 (0x1)
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#define PCA9555_REG_OUT_PORT0 (0x2)
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#define PCA9555_REG_OUT_PORT1 (0x3)
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#define PCA9555_REG_POLARITY0 (0x4)
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#define PCA9555_REG_POLARITY1 (0x5)
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#define PCA9555_REG_CONFIG0 (0x6)
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#define PCA9555_REG_CONFIG1 (0x7)
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static uint8_t dmx_universe[129];
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static void setup_pins(void)
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{
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@ -45,14 +60,50 @@ static void setup_pins(void)
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int main(void)
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{
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uint8_t i2c_command[2];
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uint8_t port;
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uint32_t odr;
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setup_pins();
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i2c_init();
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dmx_init(dmx_universe, sizeof(dmx_universe), GPIOA, 2u, 2300u, 10u, 5u);
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/* Setup Systick for 1ms ticks */
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SysTick_Config(48000000UL/1000);
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GPIOA->ODR |= (1<<5) | (1<<7);
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/* Setup PCA */
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i2c_command[0] = PCA9555_REG_CONFIG1;
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i2c_command[1] = 0x00;
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i2c_write(PCA9555_ADDR, i2c_command, 2u);
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i2c_command[0] = PCA9555_REG_CONFIG0;
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i2c_command[1] = 0xFF;
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i2c_write(PCA9555_ADDR, i2c_command, 2u);
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dmx_stream_start();
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/* Blink the LEDs */
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while (1) {
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systick_wait_ms(250);
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GPIOA->ODR ^= (1 << 5) | (1 << 6) | (1 << 7);
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systick_wait_ms(3);
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i2c_read(PCA9555_ADDR, PCA9555_REG_IN_PORT0, &port, 1u);
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i2c_command[0] = PCA9555_REG_OUT_PORT1;
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i2c_command[1] = ~port;
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odr = GPIOA->ODR;
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odr &= ~((1<<5) | (1<<6) | (1<<7));
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if (port & (1<<0)) {
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odr |= (1<<5);
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}
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if (port & (1<<1)) {
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odr |= (1<<6);
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}
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if (port & (1<<2)) {
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odr |= (1<<7);
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}
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GPIOA->ODR = odr;
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i2c_write(PCA9555_ADDR, i2c_command, 2u);
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}
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}
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