First draft. Correct labeling still missing

This commit is contained in:
Mario Hüttel 2021-05-16 17:36:18 +02:00
commit c453f96bdb
8 changed files with 16874 additions and 0 deletions

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# Created by https://www.gitignore.io/api/kicad
# Edit at https://www.gitignore.io/?templates=kicad
### KiCad ###
# For PCBs designed using KiCad: http://www.kicad-pcb.org/
# Format documentation: http://kicad-pcb.org/help/file-formats/
*.blend1
*.blend2
*.blend3
# Temporary files
*.000
*.bak
*.bck
*-bak
*.kicad_pcb-bak
*~
_autosave-*
*.tmp
*-save.pro
*-save.kicad_pcb
fp-info-cache
# Netlist files (exported from Eeschema)
*.net
# Autorouter files (exported from Pcbnew)
*.dsn
*.ses
# Exported BOM files
*.xml
*.csv
### KiCad Patch ###
escue-backup/
*.tsv
bom/
# Gerber export output
out/
# End of https://www.gitignore.io/api/kicad

1282
FT4232H.sch Normal file

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EESchema Schematic File Version 4
EELAYER 30 0
EELAYER END
$Descr A4 11693 8268
encoding utf-8
Sheet 2 4
Title "Shimatta Jtag Adapter"
Date "2021-05-14"
Rev "v1.0"
Comp "Shimatta"
Comment1 ""
Comment2 ""
Comment3 ""
Comment4 ""
$EndDescr
Text HLabel 4300 2250 0 50 Input ~ 0
IN_3V3
Text HLabel 4300 3750 0 50 Output ~ 0
OUT_3V3
Text HLabel 6700 2250 2 50 Output ~ 0
OUT_VDDIO
Text HLabel 6700 3750 2 50 Input ~ 0
IN_VDDIO
$Comp
L Logic_LevelTranslator:SN74LV1T34DBV U2
U 1 1 60A1FAEF
P 5150 2250
F 0 "U2" H 5494 2296 50 0000 L CNN
F 1 "SN74LV1T34DBV" H 5494 2205 50 0000 L CNN
F 2 "Package_TO_SOT_SMD:SOT-23-5" H 5800 2000 50 0001 C CNN
F 3 "https://www.ti.com/lit/ds/symlink/sn74lv1t34.pdf" H 4750 2050 50 0001 C CNN
1 5150 2250
1 0 0 -1
$EndComp
Text HLabel 6050 1450 2 50 Input ~ 0
VDDIO
Wire Wire Line
5450 2250 6700 2250
$Comp
L Device:C C7
U 1 1 60A227C6
P 5700 1650
F 0 "C7" H 5585 1604 50 0000 R CNN
F 1 "100n" H 5585 1695 50 0000 R CNN
F 2 "Capacitor_SMD:C_0603_1608Metric" H 5738 1500 50 0001 C CNN
F 3 "~" H 5700 1650 50 0001 C CNN
1 5700 1650
-1 0 0 1
$EndComp
Wire Wire Line
5150 1950 5150 1450
Wire Wire Line
5150 1450 5700 1450
$Comp
L power:GND #PWR0133
U 1 1 60A24F1C
P 5700 1900
F 0 "#PWR0133" H 5700 1650 50 0001 C CNN
F 1 "GND" H 5705 1727 50 0000 C CNN
F 2 "" H 5700 1900 50 0001 C CNN
F 3 "" H 5700 1900 50 0001 C CNN
1 5700 1900
1 0 0 -1
$EndComp
Wire Wire Line
5700 1900 5700 1800
Wire Wire Line
5700 1500 5700 1450
Connection ~ 5700 1450
Wire Wire Line
5700 1450 6050 1450
Wire Wire Line
5150 2550 5150 2650
$Comp
L power:GND #PWR0134
U 1 1 60A267B8
P 5150 2650
F 0 "#PWR0134" H 5150 2400 50 0001 C CNN
F 1 "GND" H 5155 2477 50 0000 C CNN
F 2 "" H 5150 2650 50 0001 C CNN
F 3 "" H 5150 2650 50 0001 C CNN
1 5150 2650
1 0 0 -1
$EndComp
Wire Wire Line
4300 2250 4850 2250
$Comp
L Logic_LevelTranslator:SN74LV1T34DBV U4
U 1 1 60A27B58
P 5150 3750
F 0 "U4" H 4806 3796 50 0000 R CNN
F 1 "SN74LV1T34DBV" H 4806 3705 50 0000 R CNN
F 2 "Package_TO_SOT_SMD:SOT-23-5" H 5800 3500 50 0001 C CNN
F 3 "https://www.ti.com/lit/ds/symlink/sn74lv1t34.pdf" H 4750 3550 50 0001 C CNN
1 5150 3750
-1 0 0 -1
$EndComp
$Comp
L Device:C C9
U 1 1 60A2B24F
P 5700 3150
F 0 "C9" H 5585 3104 50 0000 R CNN
F 1 "100n" H 5585 3195 50 0000 R CNN
F 2 "Capacitor_SMD:C_0603_1608Metric" H 5738 3000 50 0001 C CNN
F 3 "~" H 5700 3150 50 0001 C CNN
1 5700 3150
-1 0 0 1
$EndComp
Wire Wire Line
5150 3450 5150 2950
Wire Wire Line
5150 2950 5700 2950
Wire Wire Line
5700 3400 5700 3300
Wire Wire Line
5700 3000 5700 2950
Connection ~ 5700 2950
$Comp
L power:GND #PWR0135
U 1 1 60A2D17D
P 5700 3400
F 0 "#PWR0135" H 5700 3150 50 0001 C CNN
F 1 "GND" H 5705 3227 50 0000 C CNN
F 2 "" H 5700 3400 50 0001 C CNN
F 3 "" H 5700 3400 50 0001 C CNN
1 5700 3400
1 0 0 -1
$EndComp
Wire Wire Line
4300 3750 4850 3750
Wire Wire Line
5450 3750 6700 3750
$Comp
L power:GND #PWR0136
U 1 1 60A30AA2
P 5150 4150
F 0 "#PWR0136" H 5150 3900 50 0001 C CNN
F 1 "GND" H 5155 3977 50 0000 C CNN
F 2 "" H 5150 4150 50 0001 C CNN
F 3 "" H 5150 4150 50 0001 C CNN
1 5150 4150
1 0 0 -1
$EndComp
Wire Wire Line
5150 4150 5150 4050
$Comp
L power:+3V3 #PWR0137
U 1 1 60A3C135
P 5700 2800
F 0 "#PWR0137" H 5700 2650 50 0001 C CNN
F 1 "+3V3" H 5715 2973 50 0000 C CNN
F 2 "" H 5700 2800 50 0001 C CNN
F 3 "" H 5700 2800 50 0001 C CNN
1 5700 2800
1 0 0 -1
$EndComp
Wire Wire Line
5700 2800 5700 2950
Text HLabel 7650 2250 0 50 Input ~ 0
RTS_3V3
Text HLabel 10050 2250 2 50 Output ~ 0
RTS_VDDIO
$Comp
L Logic_LevelTranslator:SN74LV1T34DBV U3
U 1 1 60A4AF40
P 8500 2250
F 0 "U3" H 8844 2296 50 0000 L CNN
F 1 "SN74LV1T34DBV" H 8844 2205 50 0000 L CNN
F 2 "Package_TO_SOT_SMD:SOT-23-5" H 9150 2000 50 0001 C CNN
F 3 "https://www.ti.com/lit/ds/symlink/sn74lv1t34.pdf" H 8100 2050 50 0001 C CNN
1 8500 2250
1 0 0 -1
$EndComp
Text HLabel 9400 1450 2 50 Input ~ 0
VDDIO
Wire Wire Line
8800 2250 10050 2250
$Comp
L Device:C C8
U 1 1 60A4AF4C
P 9050 1650
F 0 "C8" H 8935 1604 50 0000 R CNN
F 1 "100n" H 8935 1695 50 0000 R CNN
F 2 "Capacitor_SMD:C_0603_1608Metric" H 9088 1500 50 0001 C CNN
F 3 "~" H 9050 1650 50 0001 C CNN
1 9050 1650
-1 0 0 1
$EndComp
Wire Wire Line
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Wire Wire Line
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$Comp
L power:GND #PWR0138
U 1 1 60A4AF58
P 9050 1900
F 0 "#PWR0138" H 9050 1650 50 0001 C CNN
F 1 "GND" H 9055 1727 50 0000 C CNN
F 2 "" H 9050 1900 50 0001 C CNN
F 3 "" H 9050 1900 50 0001 C CNN
1 9050 1900
1 0 0 -1
$EndComp
Wire Wire Line
9050 1900 9050 1800
Wire Wire Line
9050 1500 9050 1450
Connection ~ 9050 1450
Wire Wire Line
9050 1450 9400 1450
Wire Wire Line
8500 2550 8500 2650
$Comp
L power:GND #PWR0139
U 1 1 60A4AF67
P 8500 2650
F 0 "#PWR0139" H 8500 2400 50 0001 C CNN
F 1 "GND" H 8505 2477 50 0000 C CNN
F 2 "" H 8500 2650 50 0001 C CNN
F 3 "" H 8500 2650 50 0001 C CNN
1 8500 2650
1 0 0 -1
$EndComp
Wire Wire Line
7650 2250 8200 2250
$EndSCHEMATC

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EESchema-LIBRARY Version 2.4
#encoding utf-8
#
# 74xx_74HC595
#
DEF 74xx_74HC595 U 0 20 Y Y 1 F N
F0 "U" -300 550 50 H V C CNN
F1 "74xx_74HC595" -300 -650 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
ALIAS 74LS595 74HCT595 74AHC595 74AHCT595
$FPLIST
DIP*W7.62mm*
SOIC*3.9x9.9mm*P1.27mm*
TSSOP*4.4x5mm*P0.65mm*
SOIC*5.3x10.2mm*P1.27mm*
SOIC*7.5x10.3mm*P1.27mm*
$ENDFPLIST
DRAW
S -300 500 300 -600 1 1 10 f
X QB 1 400 300 100 L 50 50 1 0 T
X ~SRCLR 10 -400 100 100 R 50 50 1 0 I
X SRCLK 11 -400 200 100 R 50 50 1 0 I
X RCLK 12 -400 -100 100 R 50 50 1 0 I
X ~OE 13 -400 -200 100 R 50 50 1 0 I
X SER 14 -400 400 100 R 50 50 1 0 I
X QA 15 400 400 100 L 50 50 1 0 T
X VCC 16 0 600 100 D 50 50 1 0 W
X QC 2 400 200 100 L 50 50 1 0 T
X QD 3 400 100 100 L 50 50 1 0 T
X QE 4 400 0 100 L 50 50 1 0 T
X QF 5 400 -100 100 L 50 50 1 0 T
X QG 6 400 -200 100 L 50 50 1 0 T
X QH 7 400 -300 100 L 50 50 1 0 T
X GND 8 0 -700 100 U 50 50 1 0 W
X QH' 9 400 -500 100 L 50 50 1 0 O
ENDDRAW
ENDDEF
#
# Connector_Conn_ARM_JTAG_SWD_20
#
DEF Connector_Conn_ARM_JTAG_SWD_20 J 0 40 Y Y 1 F N
F0 "J" -200 850 50 H V R CNN
F1 "Connector_Conn_ARM_JTAG_SWD_20" -200 750 50 H V R BNN
F2 "" 450 -1050 50 H I L TNN
F3 "" -350 -1250 50 V I C CNN
$FPLIST
IDC*Header*P2.54mm*
PinHeader*2x10*P2.54mm*
$ENDFPLIST
DRAW
S -500 700 500 -700 0 1 10 f
S -110 -700 -90 -660 0 1 0 N
S -110 700 -90 660 0 1 0 N
S -10 700 10 660 0 1 0 N
S 460 90 500 110 0 1 0 N
S 500 -490 460 -510 0 1 0 N
S 500 -390 460 -410 0 1 0 N
S 500 -110 460 -90 0 1 0 N
S 500 -10 460 10 0 1 0 N
S 500 190 460 210 0 1 0 N
S 500 410 460 390 0 1 0 N
S 500 510 460 490 0 1 0 N
S 460 -210 500 -190 1 1 0 N
X VTREF 1 -100 800 100 D 50 50 1 1 W
X GND 10 -100 -800 100 U 50 50 1 1 P N
X RTCK 11 600 200 100 L 50 50 1 1 I
X GND 12 -100 -800 100 U 50 50 1 1 P N
X TDO/SWO 13 600 -100 100 L 50 50 1 1 I
X GND 14 -100 -800 100 U 50 50 1 1 P N
X ~SRST~ 15 600 400 100 L 50 50 1 1 B
X GND 16 -100 -800 100 U 50 50 1 1 P N
X DBGRQ/NC 17 600 -500 100 L 50 50 1 1 O
X GND 18 -100 -800 100 U 50 50 1 1 P N
X DBGACK/NC 19 600 -400 100 L 50 50 1 1 I
X VCC/NC 2 0 800 100 D 50 50 1 1 W
X GND 20 -100 -800 100 U 50 50 1 1 P N
X ~TRST~ 3 600 500 100 L 50 50 1 1 O
X GND 4 -100 -800 100 U 50 50 1 1 W
X TDI 5 600 -200 100 L 50 50 1 1 O
X GND 6 -100 -800 100 U 50 50 1 1 P N
X TMS/SWDIO 7 600 0 100 L 50 50 1 1 O
X GND 8 -100 -800 100 U 50 50 1 1 P N
X TCK/SWDCLK 9 600 100 100 L 50 50 1 1 O
ENDDRAW
ENDDEF
#
# Connector_Generic_Conn_01x04
#
DEF Connector_Generic_Conn_01x04 J 0 40 Y N 1 F N
F0 "J" 0 200 50 H V C CNN
F1 "Connector_Generic_Conn_01x04" 0 -300 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
Connector*:*_1x??_*
$ENDFPLIST
DRAW
S -50 -195 0 -205 1 1 6 N
S -50 -95 0 -105 1 1 6 N
S -50 5 0 -5 1 1 6 N
S -50 105 0 95 1 1 6 N
S -50 150 50 -250 1 1 10 f
X Pin_1 1 -200 100 150 R 50 50 1 1 P
X Pin_2 2 -200 0 150 R 50 50 1 1 P
X Pin_3 3 -200 -100 150 R 50 50 1 1 P
X Pin_4 4 -200 -200 150 R 50 50 1 1 P
ENDDRAW
ENDDEF
#
# Connector_Generic_Conn_02x04_Odd_Even
#
DEF Connector_Generic_Conn_02x04_Odd_Even J 0 40 Y N 1 F N
F0 "J" 50 200 50 H V C CNN
F1 "Connector_Generic_Conn_02x04_Odd_Even" 50 -300 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
Connector*:*_2x??_*
$ENDFPLIST
DRAW
S -50 -195 0 -205 1 1 6 N
S -50 -95 0 -105 1 1 6 N
S -50 5 0 -5 1 1 6 N
S -50 105 0 95 1 1 6 N
S -50 150 150 -250 1 1 10 f
S 150 -195 100 -205 1 1 6 N
S 150 -95 100 -105 1 1 6 N
S 150 5 100 -5 1 1 6 N
S 150 105 100 95 1 1 6 N
X Pin_1 1 -200 100 150 R 50 50 1 1 P
X Pin_2 2 300 100 150 L 50 50 1 1 P
X Pin_3 3 -200 0 150 R 50 50 1 1 P
X Pin_4 4 300 0 150 L 50 50 1 1 P
X Pin_5 5 -200 -100 150 R 50 50 1 1 P
X Pin_6 6 300 -100 150 L 50 50 1 1 P
X Pin_7 7 -200 -200 150 R 50 50 1 1 P
X Pin_8 8 300 -200 150 L 50 50 1 1 P
ENDDRAW
ENDDEF
#
# Connector_Generic_Conn_02x08_Odd_Even
#
DEF Connector_Generic_Conn_02x08_Odd_Even J 0 40 Y N 1 F N
F0 "J" 50 400 50 H V C CNN
F1 "Connector_Generic_Conn_02x08_Odd_Even" 50 -500 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
Connector*:*_2x??_*
$ENDFPLIST
DRAW
S -50 -395 0 -405 1 1 6 N
S -50 -295 0 -305 1 1 6 N
S -50 -195 0 -205 1 1 6 N
S -50 -95 0 -105 1 1 6 N
S -50 5 0 -5 1 1 6 N
S -50 105 0 95 1 1 6 N
S -50 205 0 195 1 1 6 N
S -50 305 0 295 1 1 6 N
S -50 350 150 -450 1 1 10 f
S 150 -395 100 -405 1 1 6 N
S 150 -295 100 -305 1 1 6 N
S 150 -195 100 -205 1 1 6 N
S 150 -95 100 -105 1 1 6 N
S 150 5 100 -5 1 1 6 N
S 150 105 100 95 1 1 6 N
S 150 205 100 195 1 1 6 N
S 150 305 100 295 1 1 6 N
X Pin_1 1 -200 300 150 R 50 50 1 1 P
X Pin_10 10 300 -100 150 L 50 50 1 1 P
X Pin_11 11 -200 -200 150 R 50 50 1 1 P
X Pin_12 12 300 -200 150 L 50 50 1 1 P
X Pin_13 13 -200 -300 150 R 50 50 1 1 P
X Pin_14 14 300 -300 150 L 50 50 1 1 P
X Pin_15 15 -200 -400 150 R 50 50 1 1 P
X Pin_16 16 300 -400 150 L 50 50 1 1 P
X Pin_2 2 300 300 150 L 50 50 1 1 P
X Pin_3 3 -200 200 150 R 50 50 1 1 P
X Pin_4 4 300 200 150 L 50 50 1 1 P
X Pin_5 5 -200 100 150 R 50 50 1 1 P
X Pin_6 6 300 100 150 L 50 50 1 1 P
X Pin_7 7 -200 0 150 R 50 50 1 1 P
X Pin_8 8 300 0 150 L 50 50 1 1 P
X Pin_9 9 -200 -100 150 R 50 50 1 1 P
ENDDRAW
ENDDEF
#
# Connector_USB_B
#
DEF Connector_USB_B J 0 40 Y Y 1 F N
F0 "J" -200 450 50 H V L CNN
F1 "Connector_USB_B" -200 350 50 H V L CNN
F2 "" 150 -50 50 H I C CNN
F3 "" 150 -50 50 H I C CNN
$FPLIST
USB*
$ENDFPLIST
DRAW
C -150 85 25 0 1 10 F
C -25 135 15 0 1 10 F
S -200 -300 200 300 0 1 10 f
S -150 220 -100 180 0 1 0 F
S -5 -300 5 -270 0 1 0 N
S 10 50 -20 20 0 1 10 F
S 200 -105 170 -95 0 1 0 N
S 200 -5 170 5 0 1 0 N
S 200 195 170 205 0 1 0 N
P 2 0 1 10 -75 85 25 85 N
P 4 0 1 10 -125 85 -100 85 -50 135 -25 135 N
P 4 0 1 10 -100 85 -75 85 -50 35 0 35 N
P 4 0 1 10 25 110 25 60 75 85 25 110 F
P 7 0 1 0 -160 170 -90 170 -90 225 -105 240 -145 240 -160 225 -160 170 N
X VBUS 1 300 200 100 L 50 50 1 1 w
X D- 2 300 -100 100 L 50 50 1 1 B
X D+ 3 300 0 100 L 50 50 1 1 B
X GND 4 0 -400 100 U 50 50 1 1 w
X Shield 5 -100 -400 100 U 50 50 1 1 P
ENDDRAW
ENDDEF
#
# Device_C
#
DEF Device_C C 0 10 N Y 1 F N
F0 "C" 25 100 50 H V L CNN
F1 "Device_C" 25 -100 50 H V L CNN
F2 "" 38 -150 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
C_*
$ENDFPLIST
DRAW
P 2 0 1 20 -80 -30 80 -30 N
P 2 0 1 20 -80 30 80 30 N
X ~ 1 0 150 110 D 50 50 1 1 P
X ~ 2 0 -150 110 U 50 50 1 1 P
ENDDRAW
ENDDEF
#
# Device_Crystal_GND24
#
DEF Device_Crystal_GND24 Y 0 40 Y N 1 F N
F0 "Y" 125 200 50 H V L CNN
F1 "Device_Crystal_GND24" 125 125 50 H V L CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
Crystal*
$ENDFPLIST
DRAW
S -45 100 45 -100 0 1 12 N
P 2 0 1 0 -100 0 -80 0 N
P 2 0 1 20 -80 -50 -80 50 N
P 2 0 1 0 0 -150 0 -140 N
P 2 0 1 0 0 140 0 150 N
P 2 0 1 20 80 -50 80 50 N
P 2 0 1 0 80 0 100 0 N
P 4 0 1 0 -100 -90 -100 -140 100 -140 100 -90 N
P 4 0 1 0 -100 90 -100 140 100 140 100 90 N
X 1 1 -150 0 50 R 50 50 1 1 P
X 2 2 0 200 50 D 50 50 1 1 P
X 3 3 150 0 50 L 50 50 1 1 P
X 4 4 0 -200 50 U 50 50 1 1 P
ENDDRAW
ENDDEF
#
# Device_Ferrite_Bead_Small
#
DEF Device_Ferrite_Bead_Small FB 0 0 N Y 1 F N
F0 "FB" 75 50 50 H V L CNN
F1 "Device_Ferrite_Bead_Small" 75 -50 50 H V L CNN
F2 "" -70 0 50 V I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
Inductor_*
L_*
*Ferrite*
$ENDFPLIST
DRAW
P 2 0 1 0 0 -50 0 -31 N
P 2 0 1 0 0 35 0 51 N
P 5 0 1 0 -72 11 -44 59 72 -8 44 -56 -72 11 N
X ~ 1 0 100 50 D 50 50 1 1 P
X ~ 2 0 -100 50 U 50 50 1 1 P
ENDDRAW
ENDDEF
#
# Device_LED
#
DEF Device_LED D 0 40 N N 1 F N
F0 "D" 0 100 50 H V C CNN
F1 "Device_LED" 0 -100 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
LED*
LED_SMD:*
LED_THT:*
$ENDFPLIST
DRAW
P 2 0 1 10 -50 -50 -50 50 N
P 2 0 1 0 -50 0 50 0 N
P 4 0 1 10 50 -50 50 50 -50 0 50 -50 N
P 5 0 1 0 -120 -30 -180 -90 -150 -90 -180 -90 -180 -60 N
P 5 0 1 0 -70 -30 -130 -90 -100 -90 -130 -90 -130 -60 N
X K 1 -150 0 100 R 50 50 1 1 P
X A 2 150 0 100 L 50 50 1 1 P
ENDDRAW
ENDDEF
#
# Device_L_Core_Ferrite
#
DEF Device_L_Core_Ferrite L 0 40 N N 1 F N
F0 "L" -50 0 50 V V C CNN
F1 "Device_L_Core_Ferrite" 110 0 50 V V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
Choke_*
*Coil*
Inductor_*
L_*
$ENDFPLIST
DRAW
A 0 -75 25 -899 899 0 1 0 N 0 -100 0 -50
A 0 -25 25 -899 899 0 1 0 N 0 -50 0 0
A 0 25 25 -899 899 0 1 0 N 0 0 0 50
A 0 75 25 -899 899 0 1 0 N 0 50 0 100
P 2 0 1 0 40 -110 40 -90 N
P 2 0 1 0 40 -70 40 -50 N
P 2 0 1 0 40 -30 40 -10 N
P 2 0 1 0 40 10 40 30 N
P 2 0 1 0 40 50 40 70 N
P 2 0 1 0 40 90 40 110 N
P 2 0 1 0 60 -90 60 -110 N
P 2 0 1 0 60 -50 60 -70 N
P 2 0 1 0 60 -10 60 -30 N
P 2 0 1 0 60 30 60 10 N
P 2 0 1 0 60 70 60 50 N
P 2 0 1 0 60 110 60 90 N
X 1 1 0 150 50 D 50 50 1 1 P
X 2 2 0 -150 50 U 50 50 1 1 P
ENDDRAW
ENDDEF
#
# Device_R
#
DEF Device_R R 0 0 N Y 1 F N
F0 "R" 80 0 50 V V C CNN
F1 "Device_R" 0 0 50 V V C CNN
F2 "" -70 0 50 V I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
R_*
$ENDFPLIST
DRAW
S -40 -100 40 100 0 1 10 N
X ~ 1 0 150 50 D 50 50 1 1 P
X ~ 2 0 -150 50 U 50 50 1 1 P
ENDDRAW
ENDDEF
#
# Jumper_Jumper_3_Bridged12
#
DEF Jumper_Jumper_3_Bridged12 JP 0 0 Y N 1 F N
F0 "JP" -100 -100 50 H V C CNN
F1 "Jumper_Jumper_3_Bridged12" 0 110 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
Jumper*
TestPoint*3Pads*
TestPoint*Bridge*
$ENDFPLIST
DRAW
A -65 -50 89 1282 518 0 1 0 N -120 20 -10 20
C -130 0 20 0 0 0 N
C 0 0 20 0 0 0 N
C 130 0 20 0 0 0 N
P 2 0 1 0 0 -50 0 -20 N
X A 1 -250 0 100 R 50 50 1 1 P
X C 2 0 -150 100 U 50 50 1 1 I
X B 3 250 0 100 L 50 50 1 1 P
ENDDRAW
ENDDEF
#
# Logic_LevelTranslator_SN74LV1T34DBV
#
DEF Logic_LevelTranslator_SN74LV1T34DBV U 0 20 Y Y 1 F N
F0 "U" 200 250 50 H V L CNN
F1 "Logic_LevelTranslator_SN74LV1T34DBV" 200 150 50 H V L CNN
F2 "Package_TO_SOT_SMD:SOT-23-5" 650 -250 50 H I C CNN
F3 "" -400 -200 50 H I C CNN
$FPLIST
SOT?23*
$ENDFPLIST
DRAW
S -200 200 200 -200 0 1 10 f
P 2 0 1 0 -30 0 -100 0 N
P 2 0 1 0 40 0 100 0 N
P 4 1 1 0 -30 -30 -30 30 40 0 -30 -30 N
X NC 1 -200 100 100 R 50 50 1 1 N N
X A 2 -300 0 100 R 50 50 1 1 I
X GND 3 0 -300 100 U 50 50 1 1 W
X Y 4 300 0 100 L 50 50 1 1 O
X VCC 5 0 300 100 D 50 50 1 1 W
ENDDRAW
ENDDEF
#
# Mechanical_MountingHole_Pad
#
DEF Mechanical_MountingHole_Pad H 0 40 N N 1 F N
F0 "H" 0 250 50 H V C CNN
F1 "Mechanical_MountingHole_Pad" 0 175 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
MountingHole*Pad*
$ENDFPLIST
DRAW
C 0 50 50 0 1 50 N
X 1 1 0 -100 100 U 50 50 1 1 I
ENDDRAW
ENDDEF
#
# Memory_EEPROM_93LCxxBxxOT
#
DEF Memory_EEPROM_93LCxxBxxOT U 0 20 Y Y 1 F N
F0 "U" -250 250 50 H V C CNN
F1 "Memory_EEPROM_93LCxxBxxOT" 300 -250 50 H V C CNN
F2 "Package_TO_SOT_SMD:SOT-23-6" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
ALIAS 93LCxxBxxOT
$FPLIST
SOT?23*
$ENDFPLIST
DRAW
S -300 200 300 -200 0 1 10 f
X DO 1 400 -100 100 L 50 50 1 1 T
X GND 2 0 -300 100 U 50 50 1 1 W
X DI 3 400 0 100 L 50 50 1 1 I
X CLK 4 400 100 100 L 50 50 1 1 I
X CS 5 -400 100 100 R 50 50 1 1 I
X VCC 6 0 300 100 D 50 50 1 1 W
ENDDRAW
ENDDEF
#
# Regulator_Linear_AP1117-33
#
DEF Regulator_Linear_AP1117-33 U 0 10 Y Y 1 F N
F0 "U" -150 125 50 H V C CNN
F1 "Regulator_Linear_AP1117-33" 0 125 50 H V L CNN
F2 "Package_TO_SOT_SMD:SOT-223-3_TabPin2" 0 200 50 H I C CNN
F3 "" 100 -250 50 H I C CNN
ALIAS AP1117-18 AP1117-25 AP1117-33 AP1117-50 LD1117S33TR_SOT223 LD1117S12TR_SOT223 LD1117S18TR_SOT223 LD1117S25TR_SOT223 LD1117S50TR_SOT223 NCP1117-12_SOT223 NCP1117-1.5_SOT223 NCP1117-1.8_SOT223 NCP1117-2.0_SOT223 NCP1117-2.5_SOT223 NCP1117-2.85_SOT223 NCP1117-3.3_SOT223 NCP1117-5.0_SOT223 AMS1117-1.5 AMS1117-1.8 AMS1117-2.5 AMS1117-2.85 AMS1117-3.3 AMS1117-5.0
$FPLIST
SOT?223*TabPin2*
$ENDFPLIST
DRAW
S -200 -200 200 75 0 1 10 f
X GND 1 0 -300 100 U 50 50 1 1 W
X VO 2 300 0 100 L 50 50 1 1 w
X VI 3 -300 0 100 R 50 50 1 1 W
ENDDRAW
ENDDEF
#
# Switch_SW_Push
#
DEF Switch_SW_Push SW 0 40 N N 1 F N
F0 "SW" 50 100 50 H V L CNN
F1 "Switch_SW_Push" 0 -60 50 H V C CNN
F2 "" 0 200 50 H I C CNN
F3 "" 0 200 50 H I C CNN
DRAW
C -80 0 20 0 1 0 N
C 80 0 20 0 1 0 N
P 2 0 1 0 0 50 0 120 N
P 2 0 1 0 100 50 -100 50 N
X 1 1 -200 0 100 R 50 50 0 1 P
X 2 2 200 0 100 L 50 50 0 1 P
ENDDRAW
ENDDEF
#
# power_+3V3
#
DEF power_+3V3 #PWR 0 0 Y Y 1 F P
F0 "#PWR" 0 -150 50 H I C CNN
F1 "power_+3V3" 0 140 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
ALIAS +3.3V
DRAW
P 2 0 1 0 -30 50 0 100 N
P 2 0 1 0 0 0 0 100 N
P 2 0 1 0 0 100 30 50 N
X +3V3 1 0 0 0 U 50 50 1 1 W N
ENDDRAW
ENDDEF
#
# power_+5V
#
DEF power_+5V #PWR 0 0 Y Y 1 F P
F0 "#PWR" 0 -150 50 H I C CNN
F1 "power_+5V" 0 140 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
P 2 0 1 0 -30 50 0 100 N
P 2 0 1 0 0 0 0 100 N
P 2 0 1 0 0 100 30 50 N
X +5V 1 0 0 0 U 50 50 1 1 W N
ENDDRAW
ENDDEF
#
# power_GND
#
DEF power_GND #PWR 0 0 Y Y 1 F P
F0 "#PWR" 0 -250 50 H I C CNN
F1 "power_GND" 0 -150 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N
X GND 1 0 0 0 D 50 50 1 1 W N
ENDDRAW
ENDDEF
#
# shimatta_connectors_10PIN_JTAG_SWD
#
DEF shimatta_connectors_10PIN_JTAG_SWD J 0 40 Y Y 1 F N
F0 "J" -280 40 50 H V C CNN
F1 "shimatta_connectors_10PIN_JTAG_SWD" 10 110 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
S -820 0 0 -1000 0 1 0 f
X VCC 1 100 -50 100 L 50 50 1 1 P
X RESET 10 100 -350 100 L 50 50 1 1 P
X TMS/SWDIO 2 100 -450 100 L 50 50 1 1 P
X GND 3 100 -250 100 L 50 50 1 1 P
X TCK/SWCLK 4 100 -550 100 L 50 50 1 1 P
X TESTMODE/VCC/GND 5 100 -150 100 L 50 50 1 1 P
X TDO/SWO 6 100 -650 100 L 50 50 1 1 P
X RX/RTCLK 7 100 -850 100 L 50 50 1 1 P
X TDI 8 100 -750 100 L 50 50 1 1 P
X TX/~TRST 9 100 -950 100 L 50 50 1 1 P
ENDDRAW
ENDDEF
#
# shimatta_interface_FT4232HQ
#
DEF shimatta_interface_FT4232HQ U 0 20 Y Y 1 F N
F0 "U" -1050 2100 50 H V L CNN
F1 "shimatta_interface_FT4232HQ" 750 2100 50 H V L CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
QFN*1EP*9x9mm*P0.5mm*
LQFP*10x10mm*P0.5mm*
$ENDFPLIST
DRAW
S -1050 -1950 1050 2050 0 1 10 f
X GND 1 -400 -2100 150 U 50 50 1 1 W
X AGND 10 -600 -2100 150 U 50 50 1 1 W
X GND 11 -200 -2100 150 U 50 50 1 1 W
X VCORE 12 -200 2200 150 D 50 50 1 1 W
X TEST 13 -1200 -1800 150 R 50 50 1 1 I
X ~RESET 14 -1200 400 150 R 50 50 1 1 I
X GND 15 -100 -2100 150 U 50 50 1 1 W
X ADBUS0 16 1200 1900 150 L 50 50 1 1 B
X ADBUS1 17 1200 1800 150 L 50 50 1 1 B
X ADBUS2 18 1200 1700 150 L 50 50 1 1 B
X ADBUS3 19 1200 1600 150 L 50 50 1 1 B
X OSCI 2 -1200 -1200 150 R 50 50 1 1 I
X VCCIO 20 200 2200 150 D 50 50 1 1 W
X ADBUS4 21 1200 1500 150 L 50 50 1 1 B
X ADBUS5 22 1200 1400 150 L 50 50 1 1 B
X ADBUS6 23 1200 1300 150 L 50 50 1 1 B
X ADBUS7 24 1200 1200 150 L 50 50 1 1 B
X GND 25 0 -2100 150 U 50 50 1 1 W
X BDBUS0 26 1200 1000 150 L 50 50 1 1 B
X BDBUS1 27 1200 900 150 L 50 50 1 1 B
X BDBUS2 28 1200 800 150 L 50 50 1 1 B
X BDBUS3 29 1200 700 150 L 50 50 1 1 B
X OSCO 3 -1200 -1600 150 R 50 50 1 1 O
X BDBUS4 30 1200 600 150 L 50 50 1 1 B
X VCCIO 31 300 2200 150 D 50 50 1 1 W
X BDBUS5 32 1200 500 150 L 50 50 1 1 B
X BDBUS6 33 1200 400 150 L 50 50 1 1 B
X BDBUS7 34 1200 300 150 L 50 50 1 1 B
X GND 35 100 -2100 150 U 50 50 1 1 W
X ~SUSPEND 36 1200 -1800 150 L 50 50 1 1 O
X VCORE 37 -100 2200 150 D 50 50 1 1 W
X CDBUS0 38 1200 100 150 L 50 50 1 1 B
X CDBUS1 39 1200 0 150 L 50 50 1 1 B
X VPHY 4 -500 2200 150 D 50 50 1 1 W
X CDBUS2 40 1200 -100 150 L 50 50 1 1 B
X CDBUS3 41 1200 -200 150 L 50 50 1 1 B
X VCCIO 42 400 2200 150 D 50 50 1 1 W
X CDBUS4 43 1200 -300 150 L 50 50 1 1 B
X CDBUS5 44 1200 -400 150 L 50 50 1 1 B
X CDBUS6 45 1200 -500 150 L 50 50 1 1 B
X CDBUS7 46 1200 -600 150 L 50 50 1 1 B
X GND 47 200 -2100 150 U 50 50 1 1 W
X DDBUS0 48 1200 -800 150 L 50 50 1 1 B
X VREGOUT 49 -1200 1700 150 R 50 50 1 1 w
X GND 5 -300 -2100 150 U 50 50 1 1 W
X VREGIN 50 -1200 1900 150 R 50 50 1 1 W
X GND 51 300 -2100 150 U 50 50 1 1 W
X DDBUS1 52 1200 -900 150 L 50 50 1 1 B
X DDBUS2 53 1200 -1000 150 L 50 50 1 1 B
X DDBUS3 54 1200 -1100 150 L 50 50 1 1 B
X DDBUS4 55 1200 -1200 150 L 50 50 1 1 B
X VCCIO 56 500 2200 150 D 50 50 1 1 W
X DDBUS5 57 1200 -1300 150 L 50 50 1 1 B
X DDBUS6 58 1200 -1400 150 L 50 50 1 1 B
X DDBUS7 59 1200 -1500 150 L 50 50 1 1 B
X REF 6 -1200 600 150 R 50 50 1 1 I
X ~PWREN 60 1200 -1700 150 L 50 50 1 1 O
X EEDATA 61 -1200 -900 150 R 50 50 1 1 B
X EECLK 62 -1200 -800 150 R 50 50 1 1 O
X EECS 63 -1200 -700 150 R 50 50 1 1 O
X VCORE 64 0 2200 150 D 50 50 1 1 W
X GNDPAD 65 400 -2100 150 U 50 50 1 1 W
X DM 7 -1200 900 150 R 50 50 1 1 B
X DP 8 -1200 800 150 R 50 50 1 1 B
X VPLL 9 -400 2200 150 D 50 50 1 1 W
ENDDRAW
ENDDEF
#
# shimatta_interface_ST3485E
#
DEF shimatta_interface_ST3485E U 0 40 Y Y 1 F N
F0 "U" 0 50 50 H V C CNN
F1 "shimatta_interface_ST3485E" 0 150 50 H V C CNN
F2 "Package_SO:SO-8_5.3x6.2mm_P1.27mm" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
S 0 0 650 -600 0 1 0 f
X RO 1 -100 -100 100 R 50 50 1 1 O
X ~RE 2 -100 -200 100 R 50 50 1 1 I
X DE 3 -100 -400 100 R 50 50 1 1 I
X DI 4 -100 -500 100 R 50 50 1 1 I
X GND 5 750 -500 100 L 50 50 1 1 W
X A 6 750 -350 100 L 50 50 1 1 B
X B 7 750 -250 100 L 50 50 1 1 B
X VCC 8 750 -100 100 L 50 50 1 1 W
ENDDRAW
ENDDEF
#
#End Library

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265
shimatta-jtag-adapter.pro Normal file
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@ -0,0 +1,265 @@
update=Fri 14 May 2021 04:01:42 PM CEST
version=1
last_client=kicad
[general]
version=1
RootSch=
BoardNm=
[cvpcb]
version=1
NetIExt=net
[eeschema]
version=1
LibDir=
[eeschema/libraries]
[pcbnew]
version=1
PageLayoutDescrFile=
LastNetListRead=
CopperLayerCount=4
BoardThickness=1.6
AllowMicroVias=0
AllowBlindVias=0
RequireCourtyardDefinitions=0
ProhibitOverlappingCourtyards=1
MinTrackWidth=0.09999999999999999
MinViaDiameter=0.4
MinViaDrill=0.3
MinMicroViaDiameter=0.2
MinMicroViaDrill=0.09999999999999999
MinHoleToHole=0.25
TrackWidth1=0.25
TrackWidth2=0.3
TrackWidth3=0.6
TrackWidth4=0.8
ViaDiameter1=0.6
ViaDrill1=0.3
ViaDiameter2=0.9
ViaDrill2=0.5
dPairWidth1=0.25
dPairGap1=0.25
dPairViaGap1=0.25
SilkLineWidth=0.12
SilkTextSizeV=1
SilkTextSizeH=1
SilkTextSizeThickness=0.15
SilkTextItalic=0
SilkTextUpright=1
CopperLineWidth=0.2
CopperTextSizeV=1.5
CopperTextSizeH=1.5
CopperTextThickness=0.3
CopperTextItalic=0
CopperTextUpright=1
EdgeCutLineWidth=0.05
CourtyardLineWidth=0.05
OthersLineWidth=0.15
OthersTextSizeV=1
OthersTextSizeH=1
OthersTextSizeThickness=0.15
OthersTextItalic=0
OthersTextUpright=1
SolderMaskClearance=0
SolderMaskMinWidth=0
SolderPasteClearance=0
SolderPasteRatio=-0
[pcbnew/Layer.F.Cu]
Name=F.Cu
Type=0
Enabled=1
[pcbnew/Layer.In1.Cu]
Name=In1.Cu
Type=1
Enabled=1
[pcbnew/Layer.In2.Cu]
Name=In2.Cu
Type=1
Enabled=1
[pcbnew/Layer.In3.Cu]
Name=In3.Cu
Type=0
Enabled=0
[pcbnew/Layer.In4.Cu]
Name=In4.Cu
Type=0
Enabled=0
[pcbnew/Layer.In5.Cu]
Name=In5.Cu
Type=0
Enabled=0
[pcbnew/Layer.In6.Cu]
Name=In6.Cu
Type=0
Enabled=0
[pcbnew/Layer.In7.Cu]
Name=In7.Cu
Type=0
Enabled=0
[pcbnew/Layer.In8.Cu]
Name=In8.Cu
Type=0
Enabled=0
[pcbnew/Layer.In9.Cu]
Name=In9.Cu
Type=0
Enabled=0
[pcbnew/Layer.In10.Cu]
Name=In10.Cu
Type=0
Enabled=0
[pcbnew/Layer.In11.Cu]
Name=In11.Cu
Type=0
Enabled=0
[pcbnew/Layer.In12.Cu]
Name=In12.Cu
Type=0
Enabled=0
[pcbnew/Layer.In13.Cu]
Name=In13.Cu
Type=0
Enabled=0
[pcbnew/Layer.In14.Cu]
Name=In14.Cu
Type=0
Enabled=0
[pcbnew/Layer.In15.Cu]
Name=In15.Cu
Type=0
Enabled=0
[pcbnew/Layer.In16.Cu]
Name=In16.Cu
Type=0
Enabled=0
[pcbnew/Layer.In17.Cu]
Name=In17.Cu
Type=0
Enabled=0
[pcbnew/Layer.In18.Cu]
Name=In18.Cu
Type=0
Enabled=0
[pcbnew/Layer.In19.Cu]
Name=In19.Cu
Type=0
Enabled=0
[pcbnew/Layer.In20.Cu]
Name=In20.Cu
Type=0
Enabled=0
[pcbnew/Layer.In21.Cu]
Name=In21.Cu
Type=0
Enabled=0
[pcbnew/Layer.In22.Cu]
Name=In22.Cu
Type=0
Enabled=0
[pcbnew/Layer.In23.Cu]
Name=In23.Cu
Type=0
Enabled=0
[pcbnew/Layer.In24.Cu]
Name=In24.Cu
Type=0
Enabled=0
[pcbnew/Layer.In25.Cu]
Name=In25.Cu
Type=0
Enabled=0
[pcbnew/Layer.In26.Cu]
Name=In26.Cu
Type=0
Enabled=0
[pcbnew/Layer.In27.Cu]
Name=In27.Cu
Type=0
Enabled=0
[pcbnew/Layer.In28.Cu]
Name=In28.Cu
Type=0
Enabled=0
[pcbnew/Layer.In29.Cu]
Name=In29.Cu
Type=0
Enabled=0
[pcbnew/Layer.In30.Cu]
Name=In30.Cu
Type=0
Enabled=0
[pcbnew/Layer.B.Cu]
Name=B.Cu
Type=0
Enabled=1
[pcbnew/Layer.B.Adhes]
Enabled=1
[pcbnew/Layer.F.Adhes]
Enabled=1
[pcbnew/Layer.B.Paste]
Enabled=1
[pcbnew/Layer.F.Paste]
Enabled=1
[pcbnew/Layer.B.SilkS]
Enabled=1
[pcbnew/Layer.F.SilkS]
Enabled=1
[pcbnew/Layer.B.Mask]
Enabled=1
[pcbnew/Layer.F.Mask]
Enabled=1
[pcbnew/Layer.Dwgs.User]
Enabled=1
[pcbnew/Layer.Cmts.User]
Enabled=1
[pcbnew/Layer.Eco1.User]
Enabled=1
[pcbnew/Layer.Eco2.User]
Enabled=1
[pcbnew/Layer.Edge.Cuts]
Enabled=1
[pcbnew/Layer.Margin]
Enabled=1
[pcbnew/Layer.B.CrtYd]
Enabled=1
[pcbnew/Layer.F.CrtYd]
Enabled=1
[pcbnew/Layer.B.Fab]
Enabled=1
[pcbnew/Layer.F.Fab]
Enabled=1
[pcbnew/Layer.Rescue]
Enabled=0
[pcbnew/Netclasses]
[pcbnew/Netclasses/Default]
Name=Default
Clearance=0.2
TrackWidth=0.25
ViaDiameter=0.6
ViaDrill=0.3
uViaDiameter=0.3
uViaDrill=0.1
dPairWidth=0.25
dPairGap=0.25
dPairViaGap=0.25
[pcbnew/Netclasses/1]
Name=RS485
Clearance=0.5
TrackWidth=0.2
ViaDiameter=0.6
ViaDrill=0.3
uViaDiameter=0.3
uViaDrill=0.1
dPairWidth=0.2
dPairGap=0.5
dPairViaGap=0.25
[pcbnew/Netclasses/2]
Name=USB
Clearance=0.2
TrackWidth=0.25
ViaDiameter=0.6
ViaDrill=0.3
uViaDiameter=0.3
uViaDrill=0.1
dPairWidth=0.3
dPairGap=0.25
dPairViaGap=0.25

1681
shimatta-jtag-adapter.sch Normal file

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599
uart3-level-translation.sch Normal file
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EESchema Schematic File Version 4
EELAYER 30 0
EELAYER END
$Descr A4 11693 8268
encoding utf-8
Sheet 4 4
Title "Shimatta Jtag Adapter"
Date "2021-05-14"
Rev "v1.0"
Comp "Shimatta"
Comment1 ""
Comment2 ""
Comment3 ""
Comment4 ""
$EndDescr
Text HLabel 3300 1400 2 50 Output ~ 0
TXD3_VDDIO
Text HLabel 6550 1400 2 50 Input ~ 0
RXD3_VDDIO
Text HLabel 3300 4300 2 50 Output ~ 0
~DTR3~_VDDIO
Text HLabel 3300 2850 2 50 Output ~ 0
~RTS3~_VDDIO
Text HLabel 6500 5750 2 50 Input ~ 0
~DCD3~_VDDIO
Text HLabel 6500 4300 2 50 Input ~ 0
~DSR3~_VDDIO
Text HLabel 6550 2850 2 50 Input ~ 0
~CTS~_VDDIO
Text HLabel 3300 5750 2 50 Output ~ 0
TXDEN3_VDDIO
Text HLabel 1600 700 0 50 Input ~ 0
VDDIO
Text HLabel 1400 1400 0 50 Input ~ 0
TXD3_3V3
Text HLabel 4650 1400 0 50 Output ~ 0
RXD3_3V3
Text HLabel 1400 2850 0 50 Input ~ 0
~RTS3~_3V3
Text HLabel 4650 2850 0 50 Output ~ 0
~CTS~_3V3
Text HLabel 1400 4300 0 50 Input ~ 0
~DTR3~_3V3
Text HLabel 4650 4300 0 50 Output ~ 0
~DSR3~_3V3
Text HLabel 4650 5750 0 50 Output ~ 0
~DCD3~_3V3
Text HLabel 1400 5750 0 50 Input ~ 0
TXDEN3_3V3
$Comp
L Logic_LevelTranslator:SN74LV1T34DBV U9
U 1 1 60D289E7
P 2000 1400
F 0 "U9" H 2344 1446 50 0000 L CNN
F 1 "SN74LV1T34DBV" H 2344 1355 50 0000 L CNN
F 2 "Package_TO_SOT_SMD:SOT-23-5" H 2650 1150 50 0001 C CNN
F 3 "https://www.ti.com/lit/ds/symlink/sn74lv1t34.pdf" H 1600 1200 50 0001 C CNN
1 2000 1400
1 0 0 -1
$EndComp
Wire Wire Line
2000 1100 2000 700
Wire Wire Line
1600 700 2000 700
Wire Wire Line
2450 700 2450 750
Wire Wire Line
2000 700 2450 700
$Comp
L Device:C C29
U 1 1 60D2BBD7
P 2450 900
F 0 "C29" H 2565 946 50 0000 L CNN
F 1 "100n" H 2565 855 50 0000 L CNN
F 2 "Capacitor_SMD:C_0603_1608Metric" H 2488 750 50 0001 C CNN
F 3 "~" H 2450 900 50 0001 C CNN
1 2450 900
1 0 0 -1
$EndComp
$Comp
L power:GND #PWR0168
U 1 1 60D2CB7A
P 2450 1100
F 0 "#PWR0168" H 2450 850 50 0001 C CNN
F 1 "GND" H 2455 927 50 0000 C CNN
F 2 "" H 2450 1100 50 0001 C CNN
F 3 "" H 2450 1100 50 0001 C CNN
1 2450 1100
1 0 0 -1
$EndComp
Wire Wire Line
2450 1100 2450 1050
$Comp
L power:GND #PWR0169
U 1 1 60D300D3
P 2000 1800
F 0 "#PWR0169" H 2000 1550 50 0001 C CNN
F 1 "GND" H 2005 1627 50 0000 C CNN
F 2 "" H 2000 1800 50 0001 C CNN
F 3 "" H 2000 1800 50 0001 C CNN
1 2000 1800
1 0 0 -1
$EndComp
Wire Wire Line
2000 1800 2000 1700
$Comp
L Logic_LevelTranslator:SN74LV1T34DBV U11
U 1 1 60D30CC2
P 2000 2850
F 0 "U11" H 2344 2896 50 0000 L CNN
F 1 "SN74LV1T34DBV" H 2344 2805 50 0000 L CNN
F 2 "Package_TO_SOT_SMD:SOT-23-5" H 2650 2600 50 0001 C CNN
F 3 "https://www.ti.com/lit/ds/symlink/sn74lv1t34.pdf" H 1600 2650 50 0001 C CNN
1 2000 2850
1 0 0 -1
$EndComp
Wire Wire Line
2000 2550 2000 2150
Text Label 2200 2150 2 50 ~ 0
VDDIO
Wire Wire Line
2450 2150 2450 2200
Wire Wire Line
2000 2150 2450 2150
$Comp
L Device:C C31
U 1 1 60D30D2E
P 2450 2350
F 0 "C31" H 2565 2396 50 0000 L CNN
F 1 "100n" H 2565 2305 50 0000 L CNN
F 2 "Capacitor_SMD:C_0603_1608Metric" H 2488 2200 50 0001 C CNN
F 3 "~" H 2450 2350 50 0001 C CNN
1 2450 2350
1 0 0 -1
$EndComp
$Comp
L power:GND #PWR0170
U 1 1 60D30D38
P 2450 2550
F 0 "#PWR0170" H 2450 2300 50 0001 C CNN
F 1 "GND" H 2455 2377 50 0000 C CNN
F 2 "" H 2450 2550 50 0001 C CNN
F 3 "" H 2450 2550 50 0001 C CNN
1 2450 2550
1 0 0 -1
$EndComp
Wire Wire Line
2450 2550 2450 2500
$Comp
L power:GND #PWR0171
U 1 1 60D30D43
P 2000 3250
F 0 "#PWR0171" H 2000 3000 50 0001 C CNN
F 1 "GND" H 2005 3077 50 0000 C CNN
F 2 "" H 2000 3250 50 0001 C CNN
F 3 "" H 2000 3250 50 0001 C CNN
1 2000 3250
1 0 0 -1
$EndComp
Wire Wire Line
2000 3250 2000 3150
$Comp
L Logic_LevelTranslator:SN74LV1T34DBV U13
U 1 1 60D3370D
P 2000 4300
F 0 "U13" H 2344 4346 50 0000 L CNN
F 1 "SN74LV1T34DBV" H 2344 4255 50 0000 L CNN
F 2 "Package_TO_SOT_SMD:SOT-23-5" H 2650 4050 50 0001 C CNN
F 3 "https://www.ti.com/lit/ds/symlink/sn74lv1t34.pdf" H 1600 4100 50 0001 C CNN
1 2000 4300
1 0 0 -1
$EndComp
Wire Wire Line
2000 4000 2000 3600
Text Label 2200 3600 2 50 ~ 0
VDDIO
Wire Wire Line
2450 3600 2450 3650
Wire Wire Line
2000 3600 2450 3600
$Comp
L Device:C C33
U 1 1 60D337BF
P 2450 3800
F 0 "C33" H 2565 3846 50 0000 L CNN
F 1 "100n" H 2565 3755 50 0000 L CNN
F 2 "Capacitor_SMD:C_0603_1608Metric" H 2488 3650 50 0001 C CNN
F 3 "~" H 2450 3800 50 0001 C CNN
1 2450 3800
1 0 0 -1
$EndComp
$Comp
L power:GND #PWR0172
U 1 1 60D337C9
P 2450 4000
F 0 "#PWR0172" H 2450 3750 50 0001 C CNN
F 1 "GND" H 2455 3827 50 0000 C CNN
F 2 "" H 2450 4000 50 0001 C CNN
F 3 "" H 2450 4000 50 0001 C CNN
1 2450 4000
1 0 0 -1
$EndComp
Wire Wire Line
2450 4000 2450 3950
$Comp
L power:GND #PWR0173
U 1 1 60D337D4
P 2000 4700
F 0 "#PWR0173" H 2000 4450 50 0001 C CNN
F 1 "GND" H 2005 4527 50 0000 C CNN
F 2 "" H 2000 4700 50 0001 C CNN
F 3 "" H 2000 4700 50 0001 C CNN
1 2000 4700
1 0 0 -1
$EndComp
Wire Wire Line
2000 4700 2000 4600
$Comp
L Logic_LevelTranslator:SN74LV1T34DBV U15
U 1 1 60D337DF
P 2000 5750
F 0 "U15" H 2344 5796 50 0000 L CNN
F 1 "SN74LV1T34DBV" H 2344 5705 50 0000 L CNN
F 2 "Package_TO_SOT_SMD:SOT-23-5" H 2650 5500 50 0001 C CNN
F 3 "https://www.ti.com/lit/ds/symlink/sn74lv1t34.pdf" H 1600 5550 50 0001 C CNN
1 2000 5750
1 0 0 -1
$EndComp
Wire Wire Line
2000 5450 2000 5050
Text Label 2200 5050 2 50 ~ 0
VDDIO
Wire Wire Line
2450 5050 2450 5100
Wire Wire Line
2000 5050 2450 5050
$Comp
L Device:C C35
U 1 1 60D337ED
P 2450 5250
F 0 "C35" H 2565 5296 50 0000 L CNN
F 1 "100n" H 2565 5205 50 0000 L CNN
F 2 "Capacitor_SMD:C_0603_1608Metric" H 2488 5100 50 0001 C CNN
F 3 "~" H 2450 5250 50 0001 C CNN
1 2450 5250
1 0 0 -1
$EndComp
$Comp
L power:GND #PWR0174
U 1 1 60D337F7
P 2450 5450
F 0 "#PWR0174" H 2450 5200 50 0001 C CNN
F 1 "GND" H 2455 5277 50 0000 C CNN
F 2 "" H 2450 5450 50 0001 C CNN
F 3 "" H 2450 5450 50 0001 C CNN
1 2450 5450
1 0 0 -1
$EndComp
Wire Wire Line
2450 5450 2450 5400
$Comp
L power:GND #PWR0175
U 1 1 60D33802
P 2000 6150
F 0 "#PWR0175" H 2000 5900 50 0001 C CNN
F 1 "GND" H 2005 5977 50 0000 C CNN
F 2 "" H 2000 6150 50 0001 C CNN
F 3 "" H 2000 6150 50 0001 C CNN
1 2000 6150
1 0 0 -1
$EndComp
Wire Wire Line
2000 6150 2000 6050
Connection ~ 2000 700
Wire Wire Line
2450 700 3050 700
Wire Wire Line
3050 700 3050 2150
Wire Wire Line
3050 5050 2450 5050
Connection ~ 2450 700
Connection ~ 2450 5050
Wire Wire Line
2450 3600 3050 3600
Connection ~ 2450 3600
Connection ~ 3050 3600
Wire Wire Line
3050 3600 3050 5050
Wire Wire Line
2450 2150 3050 2150
Connection ~ 2450 2150
Connection ~ 3050 2150
Wire Wire Line
3050 2150 3050 3600
Wire Wire Line
1400 1400 1700 1400
Wire Wire Line
1400 2850 1700 2850
Wire Wire Line
1400 4300 1700 4300
Wire Wire Line
1400 5750 1700 5750
Wire Wire Line
2300 5750 3300 5750
Wire Wire Line
2300 4300 3300 4300
Wire Wire Line
2300 2850 3300 2850
Wire Wire Line
2300 1400 3300 1400
$Comp
L Logic_LevelTranslator:SN74LV1T34DBV U10
U 1 1 60D5D0FA
P 5200 1400
F 0 "U10" H 4856 1446 50 0000 R CNN
F 1 "SN74LV1T34DBV" H 4856 1355 50 0000 R CNN
F 2 "Package_TO_SOT_SMD:SOT-23-5" H 5850 1150 50 0001 C CNN
F 3 "https://www.ti.com/lit/ds/symlink/sn74lv1t34.pdf" H 4800 1200 50 0001 C CNN
1 5200 1400
-1 0 0 -1
$EndComp
Wire Wire Line
5200 1100 5200 1000
$Comp
L power:+3V3 #PWR0176
U 1 1 60D62910
P 5200 950
F 0 "#PWR0176" H 5200 800 50 0001 C CNN
F 1 "+3V3" H 5215 1123 50 0000 C CNN
F 2 "" H 5200 950 50 0001 C CNN
F 3 "" H 5200 950 50 0001 C CNN
1 5200 950
1 0 0 -1
$EndComp
$Comp
L Device:C C30
U 1 1 60D6406C
P 5450 1000
F 0 "C30" V 5198 1000 50 0000 C CNN
F 1 "100n" V 5289 1000 50 0000 C CNN
F 2 "Capacitor_SMD:C_0603_1608Metric" H 5488 850 50 0001 C CNN
F 3 "~" H 5450 1000 50 0001 C CNN
1 5450 1000
0 1 1 0
$EndComp
Wire Wire Line
5300 1000 5200 1000
Connection ~ 5200 1000
Wire Wire Line
5200 1000 5200 950
Wire Wire Line
5600 1000 5750 1000
Wire Wire Line
5750 1000 5750 1100
$Comp
L power:GND #PWR0177
U 1 1 60D65927
P 5750 1100
F 0 "#PWR0177" H 5750 850 50 0001 C CNN
F 1 "GND" H 5755 927 50 0000 C CNN
F 2 "" H 5750 1100 50 0001 C CNN
F 3 "" H 5750 1100 50 0001 C CNN
1 5750 1100
1 0 0 -1
$EndComp
$Comp
L Logic_LevelTranslator:SN74LV1T34DBV U12
U 1 1 60D6731D
P 5200 2850
F 0 "U12" H 4856 2896 50 0000 R CNN
F 1 "SN74LV1T34DBV" H 4856 2805 50 0000 R CNN
F 2 "Package_TO_SOT_SMD:SOT-23-5" H 5850 2600 50 0001 C CNN
F 3 "https://www.ti.com/lit/ds/symlink/sn74lv1t34.pdf" H 4800 2650 50 0001 C CNN
1 5200 2850
-1 0 0 -1
$EndComp
Wire Wire Line
5200 2550 5200 2450
$Comp
L power:+3V3 #PWR0178
U 1 1 60D67438
P 5200 2400
F 0 "#PWR0178" H 5200 2250 50 0001 C CNN
F 1 "+3V3" H 5215 2573 50 0000 C CNN
F 2 "" H 5200 2400 50 0001 C CNN
F 3 "" H 5200 2400 50 0001 C CNN
1 5200 2400
1 0 0 -1
$EndComp
$Comp
L Device:C C32
U 1 1 60D67442
P 5450 2450
F 0 "C32" V 5198 2450 50 0000 C CNN
F 1 "100n" V 5289 2450 50 0000 C CNN
F 2 "Capacitor_SMD:C_0603_1608Metric" H 5488 2300 50 0001 C CNN
F 3 "~" H 5450 2450 50 0001 C CNN
1 5450 2450
0 1 1 0
$EndComp
Wire Wire Line
5300 2450 5200 2450
Connection ~ 5200 2450
Wire Wire Line
5200 2450 5200 2400
Wire Wire Line
5600 2450 5750 2450
Wire Wire Line
5750 2450 5750 2550
$Comp
L power:GND #PWR0179
U 1 1 60D67451
P 5750 2550
F 0 "#PWR0179" H 5750 2300 50 0001 C CNN
F 1 "GND" H 5755 2377 50 0000 C CNN
F 2 "" H 5750 2550 50 0001 C CNN
F 3 "" H 5750 2550 50 0001 C CNN
1 5750 2550
1 0 0 -1
$EndComp
$Comp
L Logic_LevelTranslator:SN74LV1T34DBV U14
U 1 1 60D8A89D
P 5200 4300
F 0 "U14" H 4856 4346 50 0000 R CNN
F 1 "SN74LV1T34DBV" H 4856 4255 50 0000 R CNN
F 2 "Package_TO_SOT_SMD:SOT-23-5" H 5850 4050 50 0001 C CNN
F 3 "https://www.ti.com/lit/ds/symlink/sn74lv1t34.pdf" H 4800 4100 50 0001 C CNN
1 5200 4300
-1 0 0 -1
$EndComp
Wire Wire Line
5200 4000 5200 3900
$Comp
L power:+3V3 #PWR0180
U 1 1 60D8AA32
P 5200 3850
F 0 "#PWR0180" H 5200 3700 50 0001 C CNN
F 1 "+3V3" H 5215 4023 50 0000 C CNN
F 2 "" H 5200 3850 50 0001 C CNN
F 3 "" H 5200 3850 50 0001 C CNN
1 5200 3850
1 0 0 -1
$EndComp
$Comp
L Device:C C34
U 1 1 60D8AA3C
P 5450 3900
F 0 "C34" V 5198 3900 50 0000 C CNN
F 1 "100n" V 5289 3900 50 0000 C CNN
F 2 "Capacitor_SMD:C_0603_1608Metric" H 5488 3750 50 0001 C CNN
F 3 "~" H 5450 3900 50 0001 C CNN
1 5450 3900
0 1 1 0
$EndComp
Wire Wire Line
5300 3900 5200 3900
Connection ~ 5200 3900
Wire Wire Line
5200 3900 5200 3850
Wire Wire Line
5600 3900 5750 3900
Wire Wire Line
5750 3900 5750 4000
$Comp
L power:GND #PWR0181
U 1 1 60D8AA4B
P 5750 4000
F 0 "#PWR0181" H 5750 3750 50 0001 C CNN
F 1 "GND" H 5755 3827 50 0000 C CNN
F 2 "" H 5750 4000 50 0001 C CNN
F 3 "" H 5750 4000 50 0001 C CNN
1 5750 4000
1 0 0 -1
$EndComp
$Comp
L Logic_LevelTranslator:SN74LV1T34DBV U16
U 1 1 60D8AA55
P 5200 5750
F 0 "U16" H 4856 5796 50 0000 R CNN
F 1 "SN74LV1T34DBV" H 4856 5705 50 0000 R CNN
F 2 "Package_TO_SOT_SMD:SOT-23-5" H 5850 5500 50 0001 C CNN
F 3 "https://www.ti.com/lit/ds/symlink/sn74lv1t34.pdf" H 4800 5550 50 0001 C CNN
1 5200 5750
-1 0 0 -1
$EndComp
Wire Wire Line
5200 5450 5200 5350
$Comp
L power:+3V3 #PWR0182
U 1 1 60D8AA60
P 5200 5300
F 0 "#PWR0182" H 5200 5150 50 0001 C CNN
F 1 "+3V3" H 5215 5473 50 0000 C CNN
F 2 "" H 5200 5300 50 0001 C CNN
F 3 "" H 5200 5300 50 0001 C CNN
1 5200 5300
1 0 0 -1
$EndComp
$Comp
L Device:C C36
U 1 1 60D8AA6A
P 5450 5350
F 0 "C36" V 5198 5350 50 0000 C CNN
F 1 "100n" V 5289 5350 50 0000 C CNN
F 2 "Capacitor_SMD:C_0603_1608Metric" H 5488 5200 50 0001 C CNN
F 3 "~" H 5450 5350 50 0001 C CNN
1 5450 5350
0 1 1 0
$EndComp
Wire Wire Line
5300 5350 5200 5350
Connection ~ 5200 5350
Wire Wire Line
5200 5350 5200 5300
Wire Wire Line
5600 5350 5750 5350
Wire Wire Line
5750 5350 5750 5450
$Comp
L power:GND #PWR0183
U 1 1 60D8AA79
P 5750 5450
F 0 "#PWR0183" H 5750 5200 50 0001 C CNN
F 1 "GND" H 5755 5277 50 0000 C CNN
F 2 "" H 5750 5450 50 0001 C CNN
F 3 "" H 5750 5450 50 0001 C CNN
1 5750 5450
1 0 0 -1
$EndComp
Wire Wire Line
4650 5750 4900 5750
Wire Wire Line
4650 4300 4900 4300
Wire Wire Line
4650 2850 4900 2850
Wire Wire Line
4650 1400 4900 1400
Wire Wire Line
5500 1400 6550 1400
Wire Wire Line
5500 2850 6550 2850
Wire Wire Line
5500 4300 6500 4300
Wire Wire Line
5500 5750 6500 5750
$Comp
L power:GND #PWR0184
U 1 1 60DCE5F5
P 5200 6150
F 0 "#PWR0184" H 5200 5900 50 0001 C CNN
F 1 "GND" H 5205 5977 50 0000 C CNN
F 2 "" H 5200 6150 50 0001 C CNN
F 3 "" H 5200 6150 50 0001 C CNN
1 5200 6150
1 0 0 -1
$EndComp
Wire Wire Line
5200 6150 5200 6050
$Comp
L power:GND #PWR0185
U 1 1 60DCFCDC
P 5200 4700
F 0 "#PWR0185" H 5200 4450 50 0001 C CNN
F 1 "GND" H 5205 4527 50 0000 C CNN
F 2 "" H 5200 4700 50 0001 C CNN
F 3 "" H 5200 4700 50 0001 C CNN
1 5200 4700
1 0 0 -1
$EndComp
Wire Wire Line
5200 4700 5200 4600
$Comp
L power:GND #PWR0186
U 1 1 60DD32AC
P 5200 3250
F 0 "#PWR0186" H 5200 3000 50 0001 C CNN
F 1 "GND" H 5205 3077 50 0000 C CNN
F 2 "" H 5200 3250 50 0001 C CNN
F 3 "" H 5200 3250 50 0001 C CNN
1 5200 3250
1 0 0 -1
$EndComp
Wire Wire Line
5200 3250 5200 3150
$Comp
L power:GND #PWR0187
U 1 1 60DD8219
P 5200 1800
F 0 "#PWR0187" H 5200 1550 50 0001 C CNN
F 1 "GND" H 5205 1627 50 0000 C CNN
F 2 "" H 5200 1800 50 0001 C CNN
F 3 "" H 5200 1800 50 0001 C CNN
1 5200 1800
1 0 0 -1
$EndComp
Wire Wire Line
5200 1800 5200 1700
$EndSCHEMATC