improved phy to match the timing values
This commit is contained in:
parent
5bdf863277
commit
ad9e9efe26
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@ -4,7 +4,6 @@
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<Mappings Location="src" Library="design"/>
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<Mappings Location="Common Libraries/IEEE" Library="ieee"/>
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<Mappings Location="Common Libraries" Library="not mapped"/>
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<Mappings Location="quartus" Library="not mapped"/>
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<Mappings Location="Common Libraries/STD" Library="std"/>
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<Mappings Location="" Library="work"/>
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</com.sigasi.hdt.shared.librarymapping.model:LibraryMappings>
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6
.project
6
.project
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@ -29,17 +29,17 @@
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<link>
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<name>Common Libraries/IEEE</name>
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<type>2</type>
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<locationURI>sigasiresource:/vhdl/93/IEEE</locationURI>
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<locationURI>sigasiresource:/vhdl/2008/IEEE</locationURI>
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</link>
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<link>
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<name>Common Libraries/STD</name>
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<type>2</type>
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<locationURI>sigasiresource:/vhdl/93/STD</locationURI>
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<locationURI>sigasiresource:/vhdl/2008/STD</locationURI>
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</link>
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<link>
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<name>Common Libraries/IEEE/Synopsys</name>
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<type>2</type>
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<locationURI>sigasiresource:/vhdl/93/IEEE%20Synopsys</locationURI>
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<locationURI>sigasiresource:/vhdl/2008/IEEE%20Synopsys</locationURI>
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</link>
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</linkedResources>
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</projectDescription>
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@ -57,14 +57,14 @@ begin
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case bitstate is
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when HIGH =>
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if color_vector(bitnum) = '1' then
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if counter < HIGH1 then
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if counter < HIGH1 - 1 then
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counter := counter + 1;
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else
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bitstate <= LOW;
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counter := 0;
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end if;
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else
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if counter < HIGH0 then
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if counter < HIGH0 -1 then
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counter := counter + 1;
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else
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bitstate <= LOW;
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@ -73,7 +73,7 @@ begin
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end if;
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when LOW =>
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if color_vector(bitnum) = '1' then
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if counter < LOW1 then
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if counter < LOW1 -1 then
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counter := counter + 1;
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else
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bitstate <= HIGH;
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@ -87,7 +87,7 @@ begin
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end if;
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end if;
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else
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if counter < LOW0 then
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if counter < LOW0 - 1 then
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counter := counter + 1;
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else
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bitstate <= HIGH;
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@ -13,7 +13,13 @@ end entity ws2812test;
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architecture RTL of ws2812test is
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constant LEDCNT_c : integer := 60;
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constant HEARTBEATMAX_c : integer := 700000;
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constant HEARTBEATMAX_c : integer := 700000
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-- pragma synthesis_off
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--pragma synthesis_off
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/ 10
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-- pragma synthesis_on
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--pragma synthesis_on
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;
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signal rst : std_logic;
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signal ws_busy : std_logic;
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signal ws_strb : std_logic;
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@ -0,0 +1,68 @@
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[*]
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[*] GTKWave Analyzer v3.3.76 (w)1999-2016 BSI
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[*] Tue Oct 25 08:40:37 2016
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[*]
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[dumpfile] "/tmp/SigasiCompileCache7873927896615767096/ws2812b/mentor/ws2812test_bench.ghw"
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[dumpfile_mtime] "Tue Oct 25 08:31:59 2016"
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[dumpfile_size] 70605236
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[savefile] "/home/mari/projects/fpga/sigasi/workspace/ws2812b/ws2812test_bench.gtkw"
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[timestart] 0
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[size] 2880 1508
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[pos] -1 -1
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*-42.233265 116120000000 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1
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[treeopen] top.
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[treeopen] top.ws2812test_bench.
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[treeopen] top.ws2812test_bench.ws2812test_inst.
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[treeopen] top.ws2812test_bench.ws2812test_inst.color_active.
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[treeopen] top.ws2812test_bench.ws2812test_inst.ws2812bphy_inst.
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[sst_width] 287
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[signals_width] 238
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[sst_expanded] 1
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[sst_vpaned_height] 445
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@28
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top.ws2812test_bench.ws2812test_inst.ws2812bphy_inst.bitstate
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top.ws2812test_bench.ws2812test_inst.ws2812bphy_inst.ws_output_state
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top.ws2812test_bench.ws2812test_inst.ws2812bphy_inst.strb
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top.ws2812test_bench.ws2812test_inst.ws2812bphy_inst.ws_out
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top.ws2812test_bench.ws2812test_inst.ws2812bphy_inst.busy
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top.ws2812test_bench.ws2812test_inst.ws2812bphy_inst.rst
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top.ws2812test_bench.ws2812test_inst.ws2812bphy_inst.clk
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@8022
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#{top.ws2812test_bench.ws2812test_inst.color_active.blue[7:0]} top.ws2812test_bench.ws2812test_inst.color_active.blue[7] top.ws2812test_bench.ws2812test_inst.color_active.blue[6] top.ws2812test_bench.ws2812test_inst.color_active.blue[5] top.ws2812test_bench.ws2812test_inst.color_active.blue[4] top.ws2812test_bench.ws2812test_inst.color_active.blue[3] top.ws2812test_bench.ws2812test_inst.color_active.blue[2] top.ws2812test_bench.ws2812test_inst.color_active.blue[1] top.ws2812test_bench.ws2812test_inst.color_active.blue[0]
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@20000
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-
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-
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-
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@8022
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#{top.ws2812test_bench.ws2812test_inst.color_active.green[7:0]} top.ws2812test_bench.ws2812test_inst.color_active.green[7] top.ws2812test_bench.ws2812test_inst.color_active.green[6] top.ws2812test_bench.ws2812test_inst.color_active.green[5] top.ws2812test_bench.ws2812test_inst.color_active.green[4] top.ws2812test_bench.ws2812test_inst.color_active.green[3] top.ws2812test_bench.ws2812test_inst.color_active.green[2] top.ws2812test_bench.ws2812test_inst.color_active.green[1] top.ws2812test_bench.ws2812test_inst.color_active.green[0]
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@20000
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-
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-
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-
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@8022
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#{top.ws2812test_bench.ws2812test_inst.color_active.red[7:0]} top.ws2812test_bench.ws2812test_inst.color_active.red[7] top.ws2812test_bench.ws2812test_inst.color_active.red[6] top.ws2812test_bench.ws2812test_inst.color_active.red[5] top.ws2812test_bench.ws2812test_inst.color_active.red[4] top.ws2812test_bench.ws2812test_inst.color_active.red[3] top.ws2812test_bench.ws2812test_inst.color_active.red[2] top.ws2812test_bench.ws2812test_inst.color_active.red[1] top.ws2812test_bench.ws2812test_inst.color_active.red[0]
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@20000
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-
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-
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-
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@8022
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#{top.ws2812test_bench.ws2812test_inst.blue_gamma[7:0]} top.ws2812test_bench.ws2812test_inst.blue_gamma[7] top.ws2812test_bench.ws2812test_inst.blue_gamma[6] top.ws2812test_bench.ws2812test_inst.blue_gamma[5] top.ws2812test_bench.ws2812test_inst.blue_gamma[4] top.ws2812test_bench.ws2812test_inst.blue_gamma[3] top.ws2812test_bench.ws2812test_inst.blue_gamma[2] top.ws2812test_bench.ws2812test_inst.blue_gamma[1] top.ws2812test_bench.ws2812test_inst.blue_gamma[0]
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@20000
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-
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-
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-
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@8022
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#{top.ws2812test_bench.ws2812test_inst.green_gamma[7:0]} top.ws2812test_bench.ws2812test_inst.green_gamma[7] top.ws2812test_bench.ws2812test_inst.green_gamma[6] top.ws2812test_bench.ws2812test_inst.green_gamma[5] top.ws2812test_bench.ws2812test_inst.green_gamma[4] top.ws2812test_bench.ws2812test_inst.green_gamma[3] top.ws2812test_bench.ws2812test_inst.green_gamma[2] top.ws2812test_bench.ws2812test_inst.green_gamma[1] top.ws2812test_bench.ws2812test_inst.green_gamma[0]
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@20000
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-
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-
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-
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@8022
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#{top.ws2812test_bench.ws2812test_inst.red_gamma[7:0]} top.ws2812test_bench.ws2812test_inst.red_gamma[7] top.ws2812test_bench.ws2812test_inst.red_gamma[6] top.ws2812test_bench.ws2812test_inst.red_gamma[5] top.ws2812test_bench.ws2812test_inst.red_gamma[4] top.ws2812test_bench.ws2812test_inst.red_gamma[3] top.ws2812test_bench.ws2812test_inst.red_gamma[2] top.ws2812test_bench.ws2812test_inst.red_gamma[1] top.ws2812test_bench.ws2812test_inst.red_gamma[0]
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@20001
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-
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@20000
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-
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-
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[pattern_trace] 1
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[pattern_trace] 0
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