mhu
/
reflow-oven-control-sw
2
0
Fork 0
Code Issues 4 Pull Requests Releases 4 Wiki Activity

Move PT1000 Measurement from ADC1 to ADC3 in order to make ADC1 free for Safety ADC implementation

This commit is contained in:
Mario Hüttel 2020-05-16 20:59:51 +02:00
parent b9b899b4f6
commit dc8beefb63
2 changed files with 22 additions and 17 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

34
stm-firmware/adc-meas.c
View File

@ -70,12 +70,12 @@ static inline void adc_pt1000_setup_sample_frequency_timer()
static inline void adc_pt1000_disable_adc() static inline void adc_pt1000_disable_adc()
{ {
ADC1->CR2 &= ~ADC_CR2_ADON; ADC_PT1000_PERIPH->CR2 &= ~ADC_CR2_ADON;
DMA2_Stream0->CR = 0; DMA2_Stream0->CR = 0;
pt1000_error |= ADC_PT1000_INACTIVE; pt1000_error |= ADC_PT1000_INACTIVE;
rcc_manager_disable_clock(&RCC->APB2ENR, BITMASK_TO_BITNO(RCC_APB2ENR_ADC1EN)); rcc_manager_disable_clock(&RCC->APB2ENR, BITMASK_TO_BITNO(RCC_APB2ENR_ADC3EN));
rcc_manager_disable_clock(&RCC->AHB1ENR, BITMASK_TO_BITNO(ADC_PT1000_PORT_RCC_MASK)); rcc_manager_disable_clock(&RCC->AHB1ENR, BITMASK_TO_BITNO(ADC_PT1000_PORT_RCC_MASK));
} }
@ -99,7 +99,7 @@ static inline void adc_pt1000_enable_dma_stream()
DMA2_Stream0->M0AR = (uint32_t)dma_sample_buffer; DMA2_Stream0->M0AR = (uint32_t)dma_sample_buffer;
/* Source is the ADC data register */ /* Source is the ADC data register */
DMA2_Stream0->PAR = (uint32_t)&ADC1->DR; DMA2_Stream0->PAR = (uint32_t)&ADC_PT1000_PERIPH->DR;
/* Transfer size is ADC_PT1000_DMA_AVG_SAMPLES */ /* Transfer size is ADC_PT1000_DMA_AVG_SAMPLES */
DMA2_Stream0->NDTR = ADC_PT1000_DMA_AVG_SAMPLES; DMA2_Stream0->NDTR = ADC_PT1000_DMA_AVG_SAMPLES;
@ -112,7 +112,7 @@ static inline void adc_pt1000_enable_dma_stream()
* Todo: Maybe use twice as big of a buffer and also use half-fill interrupt in order to prevent overruns * Todo: Maybe use twice as big of a buffer and also use half-fill interrupt in order to prevent overruns
*/ */
DMA2_Stream0->CR = DMA_SxCR_PL_1 | DMA_SxCR_MSIZE_0 | DMA_SxCR_PSIZE_0 | DMA_SxCR_MINC | DMA2_Stream0->CR = DMA_SxCR_PL_1 | DMA_SxCR_MSIZE_0 | DMA_SxCR_PSIZE_0 | DMA_SxCR_MINC |
DMA_SxCR_CIRC | DMA_SxCR_TCIE | DMA_SxCR_TEIE | DMA_SxCR_EN; DMA_SxCR_CIRC | DMA_SxCR_TCIE | DMA_SxCR_TEIE | DMA_SxCR_EN | ((ADC_PT1000_CHANNEL & 0x7)<<25);
} }
static inline void adc_pt1000_disable_dma_stream() static inline void adc_pt1000_disable_dma_stream()
@ -129,32 +129,32 @@ static inline void adc_pt1000_disable_dma_stream()
void adc_pt1000_setup_meas() void adc_pt1000_setup_meas()
{ {
rcc_manager_enable_clock(&RCC->APB2ENR, BITMASK_TO_BITNO(RCC_APB2ENR_ADC1EN)); rcc_manager_enable_clock(&RCC->APB2ENR, BITMASK_TO_BITNO(RCC_APB2ENR_ADC3EN));
rcc_manager_enable_clock(&RCC->AHB1ENR, BITMASK_TO_BITNO(ADC_PT1000_PORT_RCC_MASK)); rcc_manager_enable_clock(&RCC->AHB1ENR, BITMASK_TO_BITNO(ADC_PT1000_PORT_RCC_MASK));
ADC_PT1000_PORT->MODER |= ANALOG(ADC_PT1000_PIN); ADC_PT1000_PORT->MODER |= ANALOG(ADC_PT1000_PIN);
/* Set S&H time for PT1000 ADC channel */ /* Set S&H time for PT1000 ADC channel */
#if ADC_PT1000_CHANNEL < 10 #if ADC_PT1000_CHANNEL < 10
ADC1->SMPR2 |= (7U << (3*ADC_PT1000_CHANNEL)); ADC_PT1000_PERIPH->SMPR2 |= (7U << (3*ADC_PT1000_CHANNEL));
#else #else
ADC1->SMPR1 |= (7U << (3*(ADC_PT1000_CHANNEL-10))); ADC_PT1000_PERIPH->SMPR1 |= (7U << (3*(ADC_PT1000_CHANNEL-10)));
#endif #endif
ADC->CCR |= (0x2<<16); ADC->CCR |= (0x3<<16);
/* Set watchdog limits */ /* Set watchdog limits */
ADC1->HTR = ADC_PT1000_UPPER_WATCHDOG; ADC_PT1000_PERIPH->HTR = ADC_PT1000_UPPER_WATCHDOG;
ADC1->LTR = ADC_PT1000_LOWER_WATCHDOG; ADC_PT1000_PERIPH->LTR = ADC_PT1000_LOWER_WATCHDOG;
/* Set length of sequence to 1 */ /* Set length of sequence to 1 */
ADC1->SQR1 = (0UL<<20); ADC_PT1000_PERIPH->SQR1 = (0UL<<20);
/* Set channel as 1st element in sequence */ /* Set channel as 1st element in sequence */
ADC1->SQR3 = (ADC_PT1000_CHANNEL<<0); ADC_PT1000_PERIPH->SQR3 = (ADC_PT1000_CHANNEL<<0);
ADC1->CR1 = ADC_CR1_OVRIE | ADC_CR1_AWDEN | ADC_CR1_AWDIE; ADC_PT1000_PERIPH->CR1 = ADC_CR1_OVRIE | ADC_CR1_AWDEN | ADC_CR1_AWDIE;
ADC1->CR2 = ADC_CR2_EXTEN_0 | ADC_CR2_EXTSEL_2 | ADC_CR2_EXTSEL_1 | ADC_CR2_ADON | ADC_CR2_DMA | ADC_CR2_DDS; ADC_PT1000_PERIPH->CR2 = ADC_CR2_EXTEN_0 | ADC_CR2_EXTSEL_2 | ADC_CR2_EXTSEL_1 | ADC_CR2_ADON | ADC_CR2_DMA | ADC_CR2_DDS;
adc_pt1000_set_moving_average_filter_param(ADC_PT1000_FILTER_WEIGHT); adc_pt1000_set_moving_average_filter_param(ADC_PT1000_FILTER_WEIGHT);
adc_pt1000_set_resistance_calibration(0, 0, false); adc_pt1000_set_resistance_calibration(0, 0, false);
@ -324,17 +324,17 @@ void ADC_IRQHandler(void)
{ {
uint32_t adc1_sr; uint32_t adc1_sr;
adc1_sr = ADC1->SR; adc1_sr = ADC_PT1000_PERIPH->SR;
if (adc1_sr & ADC_SR_OVR) { if (adc1_sr & ADC_SR_OVR) {
ADC1->SR &= ~ADC_SR_OVR; ADC_PT1000_PERIPH->SR &= ~ADC_SR_OVR;
pt1000_error |= ADC_PT1000_OVERFLOW; pt1000_error |= ADC_PT1000_OVERFLOW;
/* Disable ADC in case of overrrun*/ /* Disable ADC in case of overrrun*/
adc_pt1000_disable(); adc_pt1000_disable();
} }
if (adc1_sr & ADC_SR_AWD) { if (adc1_sr & ADC_SR_AWD) {
ADC1->SR &= ~ADC_SR_AWD; ADC_PT1000_PERIPH->SR &= ~ADC_SR_AWD;
adc_watchdog_counter++; adc_watchdog_counter++;
if (adc_watchdog_counter >= ADC_PT1000_WATCHDOG_SAMPLE_COUNT) if (adc_watchdog_counter >= ADC_PT1000_WATCHDOG_SAMPLE_COUNT)
pt1000_error |= ADC_PT1000_WATCHDOG_ERROR; pt1000_error |= ADC_PT1000_WATCHDOG_ERROR;

5
stm-firmware/include/reflow-controller/adc-meas.h
View File

@ -24,6 +24,11 @@
#include <stdbool.h> #include <stdbool.h>
#include <stdint.h> #include <stdint.h>
#include <stm32/stm32f4xx.h> #include <stm32/stm32f4xx.h>
/*If this is changed, change DMA code to fit the channel assignment! */
#define ADC_PT1000_PERIPH ADC3
#define ADC_PT1000_DMA2_STREAM0_CHANNEL 2
/** /**
* @brief Moving average filter coefficient for PT1000 measurement * @brief Moving average filter coefficient for PT1000 measurement
*/ */