pcb/dvi-fpga
1
0
Fork 0
Code Issues Pull Requests Releases Wiki Activity

solder mask fix - urgent

Browse Source
This commit is contained in:
Mario Hüttel 2017-01-11 21:06:50 +01:00
parent 9f11b4826e
commit e2e7f9dc1b
4 changed files with 524 additions and 524 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1002
dvi-sniffer.kicad_pcb
View File

File diff suppressed because it is too large Load Diff

22
dvi-sniffer.net
View File

@ -1,7 +1,7 @@
(export (version D)
(design
(source /home/mari/projects/pcb/dvi-sniffer/dvi-sniffer.sch)
(date "Sun 08 Jan 2017 10:13:03 PM CET")
(source /home/mari/projects/pcb/dvi-fpga/dvi-sniffer.sch)
(date "Wed 11 Jan 2017 08:27:36 PM CET")
(tool "Eeschema (2016-12-16 revision f631ae27b)-master")
(sheet (number 1) (name /) (tstamps /)
(title_block
@ -187,7 +187,7 @@
(tstamp 584D4385))
(comp (ref U302)
(value EP4CE6E22C8N)
(footprint Housings_QFP:TQFP-144_20x20mm_Pitch0.5mm)
(footprint smd:TQFP-144_20x20mm_Pitch0.5mm)
(libsource (lib altera) (part EP4CE6E22C8N))
(sheetpath (names /fpga/) (tstamps /583A26B6/))
(tstamp 583A279E))
@ -1482,24 +1482,24 @@
(pin (num 64) (name DGND) (type power_in))
(pin (num 65) (name PAD) (type power_in)))))
(libraries
(library (logical memory)
(uri /usr/share/kicad/library/memory.lib))
(library (logical conn)
(uri /usr/share/kicad/library/conn.lib))
(library (logical device)
(uri /usr/share/kicad/library/device.lib))
(library (logical ti)
(uri /home/mari/projects/pcb/shimattapcblibs/schematics/ti/ti.lib))
(library (logical memory)
(uri /usr/share/kicad/library/memory.lib))
(library (logical regul)
(uri /usr/share/kicad/library/regul.lib))
(library (logical osc)
(uri /home/mari/projects/pcb/shimattapcblibs/schematics/passives/osc.lib))
(library (logical ti)
(uri /home/mari/projects/pcb/shimattapcblibs/schematics/ti/ti.lib))
(library (logical altera)
(uri /home/mari/projects/pcb/shimattapcblibs/schematics/altera/altera.lib))
(library (logical con-molex)
(uri /home/mari/projects/pcb/dvi-fpga/con-molex.lib))
(library (logical regulators)
(uri /home/mari/projects/pcb/shimattapcblibs/schematics/power/regulators.lib))
(library (logical con-molex)
(uri /home/mari/projects/pcb/dvi-sniffer/con-molex.lib)))
(library (logical osc)
(uri /home/mari/projects/pcb/shimattapcblibs/schematics/passives/osc.lib)))
(nets
(net (code 1) (name /dvi_out/TXCLK+)
(node (ref U501) (pin 57))

4
dvi_out.sch
View File

@ -1103,10 +1103,10 @@ F 3 "" H 4950 1300 60 0001 C CNN
1 0 0 -1
$EndComp
$Comp
L GND #PWR?
L GND #PWR093
U 1 1 5872B1F7
P 5100 3400
F 0 "#PWR?" H 5100 3150 50 0001 C CNN
F 0 "#PWR093" H 5100 3150 50 0001 C CNN
F 1 "GND" V 5105 3272 50 0000 R CNN
F 2 "" H 5100 3400 50 0000 C CNN
F 3 "" H 5100 3400 50 0000 C CNN

20
fpga.sch
View File

@ -56,7 +56,7 @@ U 1 1 583A279E
P 1700 2650
F 0 "U302" H 2175 4547 60 0000 C CNN
F 1 "EP4CE6E22C8N" H 2175 4441 60 0000 C CNN
F 2 "Housings_QFP:TQFP-144_20x20mm_Pitch0.5mm" H 1700 2600 60 0001 C CNN
F 2 "smd:TQFP-144_20x20mm_Pitch0.5mm" H 1700 2600 60 0001 C CNN
F 3 "" H 1700 2600 60 0000 C CNN
1 1700 2650
1 0 0 -1
@ -67,7 +67,7 @@ U 2 1 583A281F
P 4150 2750
F 0 "U302" H 4650 3947 60 0000 C CNN
F 1 "EP4CE6E22C8N" H 4650 3841 60 0000 C CNN
F 2 "Housings_QFP:TQFP-144_20x20mm_Pitch0.5mm" H 4150 2700 60 0001 C CNN
F 2 "smd:TQFP-144_20x20mm_Pitch0.5mm" H 4150 2700 60 0001 C CNN
F 3 "" H 4150 2700 60 0000 C CNN
2 4150 2750
1 0 0 -1
@ -78,7 +78,7 @@ U 3 1 583A28B1
P 9550 6000
F 0 "U302" H 10050 6997 60 0000 C CNN
F 1 "EP4CE6E22C8N" H 10050 6891 60 0000 C CNN
F 2 "Housings_QFP:TQFP-144_20x20mm_Pitch0.5mm" H 9550 5950 60 0001 C CNN
F 2 "smd:TQFP-144_20x20mm_Pitch0.5mm" H 9550 5950 60 0001 C CNN
F 3 "" H 9550 5950 60 0000 C CNN
3 9550 6000
1 0 0 -1
@ -89,7 +89,7 @@ U 4 1 583A295F
P 9250 3300
F 0 "U302" H 9850 4597 60 0000 C CNN
F 1 "EP4CE6E22C8N" H 9850 4491 60 0000 C CNN
F 2 "Housings_QFP:TQFP-144_20x20mm_Pitch0.5mm" H 9250 3250 60 0001 C CNN
F 2 "smd:TQFP-144_20x20mm_Pitch0.5mm" H 9250 3250 60 0001 C CNN
F 3 "" H 9250 3250 60 0000 C CNN
4 9250 3300
1 0 0 -1
@ -100,7 +100,7 @@ U 6 1 583A2ACD
P 6600 2100
F 0 "U302" H 7025 3597 60 0000 C CNN
F 1 "EP4CE6E22C8N" H 7025 3491 60 0000 C CNN
F 2 "Housings_QFP:TQFP-144_20x20mm_Pitch0.5mm" H 6600 2050 60 0001 C CNN
F 2 "smd:TQFP-144_20x20mm_Pitch0.5mm" H 6600 2050 60 0001 C CNN
F 3 "" H 6600 2050 60 0000 C CNN
6 6600 2100
1 0 0 -1
@ -111,7 +111,7 @@ U 7 1 583A2BA1
P 6650 4550
F 0 "U302" H 7250 5747 60 0000 C CNN
F 1 "EP4CE6E22C8N" H 7250 5641 60 0000 C CNN
F 2 "Housings_QFP:TQFP-144_20x20mm_Pitch0.5mm" H 6650 4500 60 0001 C CNN
F 2 "smd:TQFP-144_20x20mm_Pitch0.5mm" H 6650 4500 60 0001 C CNN
F 3 "" H 6650 4500 60 0000 C CNN
7 6650 4550
1 0 0 -1
@ -122,7 +122,7 @@ U 8 1 583A2C7D
P 9200 4900
F 0 "U302" H 9750 6397 60 0000 C CNN
F 1 "EP4CE6E22C8N" H 9750 6291 60 0000 C CNN
F 2 "Housings_QFP:TQFP-144_20x20mm_Pitch0.5mm" H 9200 4850 60 0001 C CNN
F 2 "smd:TQFP-144_20x20mm_Pitch0.5mm" H 9200 4850 60 0001 C CNN
F 3 "" H 9200 4850 60 0000 C CNN
8 9200 4900
1 0 0 -1
@ -133,7 +133,7 @@ U 9 1 583A2D4F
P 9250 1950
F 0 "U302" H 9850 3347 60 0000 C CNN
F 1 "EP4CE6E22C8N" H 9850 3241 60 0000 C CNN
F 2 "Housings_QFP:TQFP-144_20x20mm_Pitch0.5mm" H 9250 1900 60 0001 C CNN
F 2 "smd:TQFP-144_20x20mm_Pitch0.5mm" H 9250 1900 60 0001 C CNN
F 3 "" H 9250 1900 60 0000 C CNN
9 9250 1950
1 0 0 -1
@ -144,7 +144,7 @@ U 10 1 583A2EA1
P 3800 4550
F 0 "U302" H 4378 5283 60 0000 L CNN
F 1 "EP4CE6E22C8N" H 4378 5177 60 0000 L CNN
F 2 "Housings_QFP:TQFP-144_20x20mm_Pitch0.5mm" H 3800 4500 60 0001 C CNN
F 2 "smd:TQFP-144_20x20mm_Pitch0.5mm" H 3800 4500 60 0001 C CNN
F 3 "" H 3800 4500 60 0000 C CNN
10 3800 4550
1 0 0 -1
@ -360,7 +360,7 @@ U 5 1 583A2A03
P 6650 6200
F 0 "U302" H 7175 7797 60 0000 C CNN
F 1 "EP4CE6E22C8N" H 7175 7691 60 0000 C CNN
F 2 "Housings_QFP:TQFP-144_20x20mm_Pitch0.5mm" H 6650 6150 60 0001 C CNN
F 2 "smd:TQFP-144_20x20mm_Pitch0.5mm" H 6650 6150 60 0001 C CNN
F 3 "" H 6650 6150 60 0000 C CNN
5 6650 6200
1 0 0 -1