15 lines
518 B
VHDL
15 lines
518 B
VHDL
library ieee;
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use ieee.std_logic_1164.all;
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use ieee.numeric_std.all;
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use work.axi3intercon_pkg.all;
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package axi_w_router_pkg is
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type axi_w_masters_in_t is array (natural range <>) of master_w_in_t;
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type axi_w_masters_out_t is array (natural range <>) of master_w_out_t;
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type axi_w_slaves_out_t is array (natural range <>) of slave_w_out_t;
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type axi_w_slaves_in_t is array (natural range <>) of slave_w_in_t;
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end package axi_w_router_pkg;
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-- package body axi_w_router_pkg is
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-- end package body axi_w_router_pkg;
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