Commit Graph

60 Commits

Author SHA1 Message Date
42661014f7 Updated 2018-12-09 23:05:47 +01:00
5a3367d7df added mounting holes 2017-01-22 19:56:58 +01:00
6dc8299d9d recalculated copper pours 2017-01-22 18:41:35 +01:00
7e9ff67ad6 changed GND copper pours on top layer 2017-01-22 18:41:07 +01:00
c57e20a71c improved layout 2017-01-22 18:27:37 +01:00
c0b47089c5 connected HDMI housing to GND, increased copper pour cclearance on outer layers 2017-01-22 18:02:11 +01:00
0ab286277b added 3d model to hdmi connectors 2017-01-22 17:51:31 +01:00
adcb45e3f3 routed foo, replaced DVI with HDMI 2017-01-22 17:45:48 +01:00
e4bc30bf46 Everything connected, ready for improving layout 2017-01-21 17:44:52 +01:00
07f4bc1c3c layoutet power supply 2017-01-21 00:02:07 +01:00
7949d16df1 routed vio,1v2 2017-01-20 21:17:12 +01:00
cff2d16bbb layouted 2017-01-20 20:08:14 +01:00
e7ae749bc4 copper pour 2017-01-14 18:14:15 +01:00
05c4b58513 moved down power circuitry 2017-01-14 18:07:13 +01:00
24bdf7ae00 remove resistor network for TFP410, layoutet databus of TFP410, startet with bus from TFP401 2017-01-14 17:56:21 +01:00
ca0aabd1f4 fixed component-footprint assosciation, routed some power realted stuff, routed DVI 2017-01-14 16:46:18 +01:00
64f8fe6f11 Picked inductor, Footprint association finished 2017-01-14 01:41:19 +01:00
6d765ac5d2 created board 2017-01-14 01:03:28 +01:00
eccf90a93c started version 2,changed power supply, included latest fixes 2017-01-13 23:46:44 +01:00
a2f2ddae38 fixed footprints (added soldermask), increased clearance of copper pour on top and bottom 2017-01-11 21:14:27 +01:00
b4d73d8834 improved pcb 2017-01-11 19:53:08 +01:00
027cc8c141 removed resistors for configuration, reannotated whole schematic 2017-01-11 14:43:32 +01:00
19ae8bce67 fixed msel pin bug 2017-01-11 10:49:59 +01:00
2bd138ba01 added 3d model to footprint of power coil 2017-01-10 14:04:53 +01:00
41e33910d6 added vias in power supply for TFP401 2017-01-08 21:59:38 +01:00
9a04fc70b8 improved layout 2017-01-08 21:45:05 +01:00
202c925e6e redone switching regulator 2017-01-08 21:31:00 +01:00
65db531300 removed track 2017-01-08 14:01:30 +01:00
4d9c0971b2 added version number to pcb 2017-01-08 13:58:48 +01:00
8561e71ad7 remove 5V output, increased input voltage to 9V+ because regulator is not stable with 5V in 2017-01-08 13:57:38 +01:00
f45251d2d0 added cap in PVDD/OVDD of TFP401 2017-01-07 00:20:38 +01:00
181ea5802a moved input cap to bottom layer, improve routing of +2V5 2017-01-06 18:13:02 +01:00
7e5fce5379 moved footprints, checked silkscreen positions, reinforced some power tracks 2017-01-06 16:29:37 +01:00
23596b6827 improved layout 2017-01-05 23:21:58 +01:00
a163647422 exchanged ceramic caps with tantal 2017-01-05 21:41:36 +01:00
ad263474a2 fixed GND connection of cap for regulator 2017-01-05 20:07:08 +01:00
ab8a7ae856 fixed routing, moved caps to bottom layer, added caps for 5V rail 2017-01-04 21:32:46 +01:00
716c1b88e5 fixed cap in VIO for FPGA, added project/my name and date 2017-01-04 03:07:54 +01:00
マリオ
9b88a8374f fixed unconnected pin 2017-01-03 15:28:50 +01:00
e92f1b571f improve GND plane for switching regulator 2017-01-03 00:32:33 +01:00
71dffbb622 fixed routing of some tracks 2017-01-02 21:39:35 +01:00
91d4946fd7 fixed copper pour 2017-01-01 23:15:30 +01:00
032c2f39c6 edited 2017-01-01 23:05:09 +01:00
e1a0819a87 created gerber 2017-01-01 21:12:58 +01:00
84a264b12b changed copper pur 2017-01-01 20:43:55 +01:00
d94a5e72cb added symbols, fixed silkscreen, last changes 2017-01-01 20:34:59 +01:00
78cc0cddcd edited polygons 2016-12-17 22:40:00 +01:00
5395223a8b edited layout 2016-12-13 20:55:46 +01:00
684f9625ee finished first draft 2016-12-13 20:25:47 +01:00
8fd8d39297 layout, added cap in 3v3 2016-12-13 15:31:47 +01:00