fpga/EthMac
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Ethernet MAC in VHDL with simple demo application.
6 Commits 1 Branch 0 Tags 126 KiB
VHDL 99%
C 1%
b64af9e9de
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Mario Hüttel b64af9e9de Fix missing in assignment in port
2020-08-10 22:41:29 +02:00
.settings init EthMac prject with RX, TX core and LED Demo 2017-02-25 21:12:20 +01:00
bench Make design MII compatible 2020-08-07 21:48:11 +02:00
design Fix missing in assignment in port 2020-08-10 22:41:29 +02:00
fcs-c added GPLv2 headers, renamed executable of CRC C program, added LICENSE.md file 2017-02-25 21:34:03 +01:00
.gitignore Make design MII compatible 2020-08-07 21:48:11 +02:00
.library_mapping.xml init EthMac prject with RX, TX core and LED Demo 2017-02-25 21:12:20 +01:00
.project init EthMac prject with RX, TX core and LED Demo 2017-02-25 21:12:20 +01:00
LICENSE.md added GPLv2 headers, renamed executable of CRC C program, added LICENSE.md file 2017-02-25 21:34:03 +01:00