fixed footprints (added soldermask), increased clearance of copper pour on top and bottom

improved pcb
removed resistors for configuration, reannotated whole schematic
2017-01-11 21:14:27 +01:00 · 2017-01-11 19:53:08 +01:00 · 2017-01-11 14:43:32 +01:00 · 2017-01-11 10:49:59 +01:00 · 2017-01-10 14:04:53 +01:00 · 2017-01-08 21:59:38 +01:00
11 changed files with 23150 additions and 1444 deletions
--- a/.gitignore
+++ b/.gitignore
@@ -3,4 +3,4 @@
 *.kicad_pcb-bak
 _saved*
 _autosave*
-
+gerber
--- a/dvi-sniffer-cache.lib
+++ b/dvi-sniffer-cache.lib
@@ -47,6 +47,21 @@ X +3V3 1 0 0 0 U 50 50 1 1 W N
 ENDDRAW
 ENDDEF
 #
+# +5V
+#
+DEF +5V #PWR 0 0 Y Y 1 F P
+F0 "#PWR" 0 -150 50 H I C CNN
+F1 "+5V" 0 140 50 H V C CNN
+F2 "" 0 0 50 H V C CNN
+F3 "" 0 0 50 H V C CNN
+DRAW
+P 2 0 1 0 -30 50 0 100 N
+P 2 0 1 0 0 0 0 100 N
+P 2 0 1 0 0 100 30 50 N
+X +5V 1 0 0 0 U 50 50 1 1 W N
+ENDDRAW
+ENDDEF
+#
 # +V_IO
 #
 DEF +V_IO #PWR 0 0 Y Y 1 F P
@@ -125,6 +140,46 @@ X ~ 2 0 -150 110 U 50 50 1 1 P
 ENDDRAW
 ENDDEF
 #
+# CONN_01X11
+#
+DEF CONN_01X11 P 0 40 Y N 1 F N
+F0 "P" 0 600 50 H V C CNN
+F1 "CONN_01X11" 100 0 50 V V C CNN
+F2 "" 0 0 50 H V C CNN
+F3 "" 0 0 50 H V C CNN
+$FPLIST
+ Pin_Header_Straight_1X11
+ Pin_Header_Angled_1X11
+ Socket_Strip_Straight_1X11
+ Socket_Strip_Angled_1X11
+$ENDFPLIST
+DRAW
+S -50 -495 10 -505 0 1 0 N
+S -50 -395 10 -405 0 1 0 N
+S -50 -295 10 -305 0 1 0 N
+S -50 -195 10 -205 0 1 0 N
+S -50 -95 10 -105 0 1 0 N
+S -50 5 10 -5 0 1 0 N
+S -50 105 10 95 0 1 0 N
+S -50 205 10 195 0 1 0 N
+S -50 305 10 295 0 1 0 N
+S -50 405 10 395 0 1 0 N
+S -50 505 10 495 0 1 0 N
+S -50 550 50 -550 0 1 0 N
+X P1 1 -200 500 150 R 50 50 1 1 P
+X P2 2 -200 400 150 R 50 50 1 1 P
+X P3 3 -200 300 150 R 50 50 1 1 P
+X P4 4 -200 200 150 R 50 50 1 1 P
+X P5 5 -200 100 150 R 50 50 1 1 P
+X P6 6 -200 0 150 R 50 50 1 1 P
+X P7 7 -200 -100 150 R 50 50 1 1 P
+X P8 8 -200 -200 150 R 50 50 1 1 P
+X P9 9 -200 -300 150 R 50 50 1 1 P
+X P10 10 -200 -400 150 R 50 50 1 1 P
+X P11 11 -200 -500 150 R 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
 # CONN_02X05
 #
 DEF CONN_02X05 P 0 1 Y N 1 F N
@@ -473,6 +528,27 @@ X VI 3 -400 50 150 R 50 50 1 1 W
 ENDDRAW
 ENDDEF
 #
+# LED
+#
+DEF LED D 0 40 Y N 1 F N
+F0 "D" 0 100 50 H V C CNN
+F1 "LED" 0 -100 50 H V C CNN
+F2 "" 0 0 50 H V C CNN
+F3 "" 0 0 50 H V C CNN
+$FPLIST
+ LED*
+$ENDFPLIST
+DRAW
+P 2 0 1 8 -50 -50 -50 50 N
+P 2 0 1 0 -50 0 50 0 N
+P 4 0 1 8 50 -50 50 50 -50 0 50 -50 N
+P 5 0 1 0 -120 -30 -180 -90 -150 -90 -180 -90 -180 -60 N
+P 5 0 1 0 -70 -30 -130 -90 -100 -90 -130 -90 -130 -60 N
+X K 1 -150 0 100 R 50 50 1 1 P
+X A 2 150 0 100 L 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
 # LM2596
 #
 DEF LM2596 U 0 40 Y Y 1 F N
@@ -564,6 +640,57 @@ X VDD 4 -300 550 300 R 60 60 1 1 W
 ENDDRAW
 ENDDEF
 #
+# Polyfuse
+#
+DEF Polyfuse F 0 0 N Y 1 F N
+F0 "F" -100 0 50 V V C CNN
+F1 "Polyfuse" 100 0 50 V V C CNN
+F2 "" 50 -200 50 H I L CNN
+F3 "" 0 0 50 H I C CNN
+$FPLIST
+ *polyfuse*
+ *PTC*
+$ENDFPLIST
+DRAW
+S -30 100 30 -100 0 1 10 N
+P 2 0 1 0 0 100 0 -100 N
+P 4 0 1 0 -60 100 -60 60 60 -60 60 -100 N
+X ~ 1 0 150 50 D 50 50 1 1 P
+X ~ 2 0 -150 50 U 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
+# Q_NMOS_GSD
+#
+DEF Q_NMOS_GSD Q 0 0 Y N 1 F N
+F0 "Q" 200 50 50 H V L CNN
+F1 "Q_NMOS_GSD" 200 -50 50 H V L CNN
+F2 "" 200 100 50 H V C CNN
+F3 "" 0 0 50 H V C CNN
+DRAW
+C 65 0 111 0 1 10 N
+C 100 -70 11 0 1 0 F
+C 100 70 11 0 1 0 F
+P 2 0 1 0 30 -70 100 -70 N
+P 2 0 1 10 30 -50 30 -90 N
+P 2 0 1 0 30 0 100 0 N
+P 2 0 1 10 30 20 30 -20 N
+P 2 0 1 0 30 70 100 70 N
+P 2 0 1 10 30 90 30 50 N
+P 2 0 1 0 100 -70 100 -100 N
+P 2 0 1 0 100 -70 100 0 N
+P 2 0 1 0 100 100 100 70 N
+P 3 0 1 10 10 75 10 -75 10 -75 N
+P 4 0 1 0 40 0 80 15 80 -15 40 0 F
+P 4 0 1 0 100 -70 130 -70 130 70 100 70 N
+P 4 0 1 0 110 20 115 15 145 15 150 10 N
+P 4 0 1 0 130 15 115 -10 145 -10 130 15 N
+X G 1 -200 0 210 R 50 50 1 1 I
+X S 2 100 -200 100 U 50 50 1 1 P
+X D 3 100 200 100 D 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
 # R
 #
 DEF R R 0 0 N Y 1 F N
@@ -582,37 +709,6 @@ X ~ 2 0 -150 50 U 50 50 1 1 P
 ENDDRAW
 ENDDEF
 #
-# R_Pack03
-#
-DEF R_Pack03 RN 0 0 Y N 1 F N
-F0 "RN" -200 0 50 V V C CNN
-F1 "R_Pack03" 200 0 50 V V C CNN
-F2 "" 275 0 50 V I C CNN
-F3 "" 0 0 50 H V C CNN
-$FPLIST
- DIP*
- SOIC*
-$ENDFPLIST
-DRAW
-S -150 -95 150 95 0 1 10 f
-S -125 75 -75 -75 0 1 10 N
-S -25 75 25 -75 0 1 10 N
-S 75 75 125 -75 0 1 10 N
-P 2 0 1 0 -100 -100 -100 -75 N
-P 2 0 1 0 -100 75 -100 100 N
-P 2 0 1 0 0 -100 0 -75 N
-P 2 0 1 0 0 75 0 100 N
-P 2 0 1 0 100 -100 100 -75 N
-P 2 0 1 0 100 75 100 100 N
-X R1.1 1 -100 -200 100 U 50 50 1 1 P
-X R2.1 2 0 -200 100 U 50 50 1 1 P
-X R3.1 3 100 -200 100 U 50 50 1 1 P
-X R3.2 4 100 200 100 D 50 50 1 1 P
-X R2.2 5 0 200 100 D 50 50 1 1 P
-X R1.2 6 -100 200 100 D 50 50 1 1 P
-ENDDRAW
-ENDDEF
-#
 # R_Pack04
 #
 DEF R_Pack04 RN 0 0 Y N 1 F N
@@ -685,6 +781,7 @@ X OVDD 29 900 -1150 200 L 50 50 1 1 W
 X DGND 39 -200 -200 200 R 50 50 1 1 W
 X AGND 79 -200 -500 200 R 50 50 1 1 W
 X AGND 89 -200 -800 200 R 50 50 1 1 W
+X PAD 101 350 -1900 200 U 50 50 1 1 W
 S 1150 -4450 0 0 2 1 0 f
 X DFO 1 -200 -1700 200 R 50 50 2 1 I
 X ~PD 2 -200 -1300 200 R 50 50 2 1 I I
@@ -778,7 +875,7 @@ X CTL3 6 -200 -3050 200 R 50 50 1 1 I
 X CTL2 7 -200 -3150 200 R 50 50 1 1 I
 X CTL1 8 -200 -3250 200 R 50 50 1 1 I
 X EDGE/HTPLG 9 -200 -3850 200 R 50 50 1 1 I
-X ~PD ~ -200 -4050 200 R 50 50 1 1 I I
+X ~PD 10 -200 -4050 200 R 50 50 1 1 I I
 X TX2- 30 1050 -900 200 L 50 50 1 1 O
 X DATA19 40 -200 -2000 200 R 50 50 1 1 I
 X DATA11 50 -200 -1200 200 R 50 50 1 1 I
@@ -829,6 +926,7 @@ X TGND 32 -200 -800 200 R 50 50 2 1 W
 X TVDD 23 900 -600 200 L 50 50 2 1 W
 X DVDD 33 900 -300 200 L 50 50 2 1 W
 X DGND 64 -200 -300 200 R 50 50 2 1 W
+X PAD 65 350 -1200 200 U 50 50 2 1 W
 X DGND 16 -200 -100 200 R 50 50 2 1 W
 X TGND 26 -200 -700 200 R 50 50 2 1 W
 X PGND 17 -200 -450 200 R 50 50 2 1 W
--- a/dvi-sniffer.kicad_pcb
+++ b/dvi-sniffer.kicad_pcb
--- a/dvi-sniffer.net
+++ b/dvi-sniffer.net
--- a/dvi-sniffer.sch
+++ b/dvi-sniffer.sch
@@ -58,12 +58,12 @@ F1 "power.sch" 60
 F2 "VIN" I L 1850 1550 60 
 $EndSheet
 $Comp
-L BARREL_JACK CON?
+L BARREL_JACK CON101
 U 1 1 583A22E7
 P 1050 1650
-F 0 "CON?" H 1031 1975 50  0000 C CNN
-F 1 "BARREL_JACK" H 1031 1884 50  0000 C CNN
-F 2 "" H 1050 1650 50  0000 C CNN
+F 0 "CON101" H 1031 1975 50  0000 C CNN
+F 1 "PJ-002A" H 1031 1884 50  0000 C CNN
+F 2 "Connect:BARREL_JACK" H 1050 1650 50  0001 C CNN
 F 3 "" H 1050 1650 50  0000 C CNN
 	1    1050 1650
 	1    0    0    -1  
@@ -80,48 +80,52 @@ F 3 "" H 1450 1850 50  0000 C CNN
 	1    0    0    -1  
 $EndComp
 $Sheet
-S 6600 3300 2000 2300
+S 6100 900  2000 2300
 U 583A26B6
 F0 "fpga" 60
 F1 "fpga.sch" 60
-F2 "DATI[0..23]" I L 6600 3500 60 
-F3 "CLKIN" I L 6600 3700 60 
-F4 "HSYNC_IN" I L 6600 3800 60 
-F5 "VSYNC_IN" I L 6600 3900 60 
-F6 "DE_IN" I L 6600 4000 60 
-F7 "LINK_ACT_IN" I L 6600 4100 60 
-F8 "TXCLK-" O R 8600 3800 60 
-F9 "DATO[0..23]" O R 8600 3500 60 
-F10 "HSYNC_OUT" O R 8600 3900 60 
-F11 "VSYNC_OUT" O R 8600 4000 60 
-F12 "DE_OUT" O R 8600 4100 60 
-F13 "TXCLK+" O R 8600 3700 60 
-F14 "DDCDAT_IN" B L 6600 4650 60 
-F15 "DDCCLK_IN" I L 6600 4550 60 
-F16 "DDCDAT_OUT" B R 8600 4650 60 
-F17 "DDCCLK_OUT" O R 8600 4550 60 
-F18 "HOTPLUG_OUT" O L 6600 4350 60 
-F19 "HOTPLUG_IN" I R 8600 4350 60 
-F20 "CTL_IN[1..3]" I L 6600 3400 60 
-F21 "CTL_OUT[1..3]" O R 8600 3400 60 
+F2 "DATI[0..23]" I L 6100 1100 60 
+F3 "CLKIN" I L 6100 1300 60 
+F4 "HSYNC_IN" I L 6100 1400 60 
+F5 "VSYNC_IN" I L 6100 1500 60 
+F6 "DE_IN" I L 6100 1600 60 
+F7 "LINK_ACT_IN" I L 6100 1700 60 
+F8 "DATO[0..23]" O R 8100 1100 60 
+F9 "HSYNC_OUT" O R 8100 1500 60 
+F10 "VSYNC_OUT" O R 8100 1600 60 
+F11 "DE_OUT" O R 8100 1700 60 
+F12 "TXCLK+" O R 8100 1300 60 
+F13 "DDCDAT_IN" B L 6100 2250 60 
+F14 "DDCCLK_IN" I L 6100 2150 60 
+F15 "DDCDAT_OUT" B R 8100 2250 60 
+F16 "DDCCLK_OUT" O R 8100 2150 60 
+F17 "HOTPLUG_OUT" O L 6100 1950 60 
+F18 "HOTPLUG_IN" I R 8100 1950 60 
+F19 "CTL_IN[1..3]" I L 6100 1000 60 
+F20 "CTL_OUT[1..3]" O R 8100 1000 60 
+F21 "DKEN_OUT" O R 8100 2350 60 
+F22 "EDGE_OUT" O R 8100 2450 60 
+F23 "POWERDOWN" O R 8100 2750 60 
+F24 "GPIO[0..7]" B R 8100 3100 60 
 $EndSheet
 $Sheet
-S 3900 3300 1550 2300
+S 3400 900  1550 2300
 U 583B5F85
 F0 "dvi_in" 60
 F1 "dvi_in.sch" 60
-F2 "DATI[0..23]" O R 5450 3500 60 
-F3 "HOTPLUG" I R 5450 4350 60 
-F4 "DDCCLK_IN" O R 5450 4550 60 
-F5 "DDCDAT_IN" B R 5450 4650 60 
-F6 "LINK_ACT" O R 5450 4100 60 
-F7 "CTL[1..3]" O R 5450 3400 60 
-F8 "DE" O R 5450 4000 60 
-F9 "OCLK" O R 5450 3700 60 
-F10 "HSYNC" O R 5450 3800 60 
-F11 "VSYNC" O R 5450 3900 60 
+F2 "DATI[0..23]" O R 4950 1100 60 
+F3 "HOTPLUG" I R 4950 1950 60 
+F4 "DDCCLK_IN" O R 4950 2150 60 
+F5 "DDCDAT_IN" B R 4950 2250 60 
+F6 "LINK_ACT" O R 4950 1700 60 
+F7 "CTL[1..3]" O R 4950 1000 60 
+F8 "DE" O R 4950 1600 60 
+F9 "OCLK" O R 4950 1300 60 
+F10 "HSYNC" O R 4950 1400 60 
+F11 "VSYNC" O R 4950 1500 60 
+F12 "PDOWN" I R 4950 2750 60 
 $EndSheet
-Text Label 5800 3500 0    60   ~ 0
+Text Label 5300 1100 0    60   ~ 0
 DATI[0..23]
 Wire Wire Line
 	1350 1650 1450 1650
@@ -133,31 +137,181 @@ Connection ~ 1450 1750
 Wire Wire Line
 	1350 1550 1850 1550
 Wire Bus Line
-	5450 3500 6600 3500
+	4950 1100 6100 1100
 Wire Wire Line
-	5450 3700 6600 3700
+	4950 1300 6100 1300
 Wire Wire Line
-	5450 3800 6600 3800
+	4950 1400 6100 1400
 Wire Wire Line
-	5450 3900 6600 3900
+	4950 1500 6100 1500
 Wire Wire Line
-	5450 4000 6600 4000
+	4950 1600 6100 1600
 Wire Wire Line
-	5450 4100 6600 4100
+	4950 1700 6100 1700
 Wire Bus Line
-	5450 3400 6600 3400
-Text Label 5800 3400 0    60   ~ 0
+	4950 1000 6100 1000
+Text Label 5300 1000 0    60   ~ 0
 CTL_IN[1..3]
 Wire Wire Line
-	6600 4350 5450 4350
+	6100 1950 4950 1950
 Wire Wire Line
-	6600 4550 5450 4550
+	6100 2150 4950 2150
 Wire Wire Line
-	5450 4650 6600 4650
+	4950 2250 6100 2250
 $Sheet
-S 10200 3300 1250 2300
+S 9700 900  1250 2300
 U 583BE4A7
 F0 "dvi_out" 60
 F1 "dvi_out.sch" 60
+F2 "TXCLK+" I L 9700 1300 60 
+F3 "DATO[0..23]" I L 9700 1100 60 
+F4 "VSYNC" I L 9700 1600 60 
+F5 "HSYNC" I L 9700 1500 60 
+F6 "DE" I L 9700 1700 60 
+F7 "CTL[1..3]" I L 9700 1000 60 
+F8 "MSEN" O L 9700 1800 60 
+F9 "DDCCLK" I L 9700 2150 60 
+F10 "DDCDAT" B L 9700 2250 60 
+F11 "HOTPLUG" O L 9700 1950 60 
+F12 "DKEN" I L 9700 2350 60 
+F13 "EDGE" I L 9700 2450 60 
+F14 "PDOWN" I L 9700 2750 60 
 $EndSheet
+Wire Wire Line
+	8100 1300 9700 1300
+Wire Wire Line
+	9700 2150 8100 2150
+Wire Wire Line
+	9700 2250 8100 2250
+Wire Wire Line
+	9700 1950 8100 1950
+Wire Bus Line
+	8100 1000 9700 1000
+Wire Bus Line
+	9700 1100 8100 1100
+Text Label 8450 1000 0    60   ~ 0
+CTL_OUT[1..3]
+Text Label 8450 1100 0    60   ~ 0
+DATO[0..23]
+Wire Wire Line
+	8100 1500 9700 1500
+Wire Wire Line
+	9700 1600 8100 1600
+Wire Wire Line
+	8100 1700 9700 1700
+Wire Wire Line
+	8100 2350 9700 2350
+Wire Wire Line
+	8100 2450 9700 2450
+Wire Wire Line
+	4950 2750 5950 2750
+Wire Wire Line
+	5950 2750 5950 3350
+Wire Wire Line
+	5950 3350 8300 3350
+Wire Wire Line
+	8300 3350 8300 2750
+Wire Wire Line
+	8100 2750 9700 2750
+Connection ~ 8300 2750
+Wire Bus Line
+	8100 3100 8800 3100
+Wire Bus Line
+	8800 3100 8800 4900
+Entry Wire Line
+	8800 4900 8900 5000
+Entry Wire Line
+	8800 4800 8900 4900
+Entry Wire Line
+	8800 4700 8900 4800
+Entry Wire Line
+	8800 4600 8900 4700
+Entry Wire Line
+	8800 4500 8900 4600
+Entry Wire Line
+	8800 4400 8900 4500
+Entry Wire Line
+	8800 4300 8900 4400
+Entry Wire Line
+	8800 4200 8900 4300
+Wire Wire Line
+	8900 4300 9250 4300
+Wire Wire Line
+	8900 4400 9250 4400
+Wire Wire Line
+	8900 4500 9250 4500
+Wire Wire Line
+	8900 4600 9250 4600
+Wire Wire Line
+	9250 4700 8900 4700
+Wire Wire Line
+	8900 4800 9250 4800
+Wire Wire Line
+	9250 4900 8900 4900
+Wire Wire Line
+	8900 5000 9250 5000
+Text Label 8350 3100 0    60   ~ 0
+GPIO[0..7]
+Text Label 8900 4300 0    60   ~ 0
+GPIO0
+Text Label 8900 4400 0    60   ~ 0
+GPIO1
+Text Label 8900 4500 0    60   ~ 0
+GPIO2
+Text Label 8900 4600 0    60   ~ 0
+GPIO3
+Text Label 8900 4700 0    60   ~ 0
+GPIO4
+Text Label 8900 4800 0    60   ~ 0
+GPIO5
+Text Label 8900 4900 0    60   ~ 0
+GPIO6
+Text Label 8900 5000 0    60   ~ 0
+GPIO7
+$Comp
+L CONN_01X11 P101
+U 1 1 584D1B7E
+P 9450 4500
+F 0 "P101" H 9528 4541 50  0000 L CNN
+F 1 "CONN_01X11" H 9528 4450 50  0000 L CNN
+F 2 "Terminal_Blocks:TerminalBlock_Pheonix_MKDS1.5-11pol" H 9450 4500 50  0001 C CNN
+F 3 "" H 9450 4500 50  0000 C CNN
+	1    9450 4500
+	1    0    0    -1  
+$EndComp
+Wire Wire Line
+	9250 4200 8900 4200
+Wire Wire Line
+	8900 4200 8900 3850
+$Comp
+L GND #PWR02
+U 1 1 584D1EA7
+P 8900 3850
+F 0 "#PWR02" H 8900 3600 50  0001 C CNN
+F 1 "GND" H 8905 3677 50  0000 C CNN
+F 2 "" H 8900 3850 50  0000 C CNN
+F 3 "" H 8900 3850 50  0000 C CNN
+	1    8900 3850
+	-1   0    0    1   
+$EndComp
+$Comp
+L +3V3 #PWR03
+U 1 1 584D223B
+P 9100 3800
+F 0 "#PWR03" H 9100 3650 50  0001 C CNN
+F 1 "+3V3" H 9100 3950 50  0000 C CNN
+F 2 "" H 9100 3800 50  0000 C CNN
+F 3 "" H 9100 3800 50  0000 C CNN
+	1    9100 3800
+	1    0    0    -1  
+$EndComp
+Wire Wire Line
+	9100 3800 9100 4000
+Wire Wire Line
+	9100 4000 9250 4000
+Wire Wire Line
+	9250 4100 9150 4100
+Wire Wire Line
+	9150 4100 9150 4200
+Connection ~ 9150 4200
 $EndSCHEMATC
--- a/dvi.pretty/dvi.kicad_mod
+++ b/dvi.pretty/dvi.kicad_mod
@@ -0,0 +1,66 @@
+(module dvi (layer F.Cu)
+  (descr "DVI connector, Tyco P/N 1-1734147-1")
+  (fp_text reference DVI (at 0 6.10108) (layer F.SilkS)
+    (effects (font (thickness 0.3048)))
+  )
+  (fp_text value JP*** (at 0 -10.795) (layer F.SilkS)
+    (effects (font (thickness 0.3048)))
+  )
+  (fp_line (start -12.573 -9.017) (end -14.097 -7.493) (layer F.SilkS) (width 0.381))
+  (fp_line (start -14.097 -7.493) (end -14.097 -3.302) (layer F.SilkS) (width 0.381))
+  (fp_line (start 14.224 -7.62) (end 14.224 -3.302) (layer F.SilkS) (width 0.381))
+  (fp_line (start 12.573 -9.017) (end 14.224 -7.62) (layer F.SilkS) (width 0.381))
+  (fp_line (start -12.573 -9.017) (end -12.573 -0.508) (layer F.SilkS) (width 0.381))
+  (fp_line (start 12.573 -9.017) (end 12.573 -0.508) (layer F.SilkS) (width 0.381))
+  (fp_line (start -18.415 -0.508) (end -18.415 -3.302) (layer F.SilkS) (width 0.381))
+  (fp_line (start -18.415 -3.302) (end -12.573 -3.302) (layer F.SilkS) (width 0.381))
+  (fp_line (start 18.415 -0.508) (end 18.415 -3.302) (layer F.SilkS) (width 0.381))
+  (fp_line (start 18.415 -3.302) (end 12.573 -3.302) (layer F.SilkS) (width 0.381))
+  (fp_line (start 18.415 -0.508) (end 18.415 2.54) (layer F.SilkS) (width 0.381))
+  (fp_line (start -18.415 -0.508) (end -18.415 2.54) (layer F.SilkS) (width 0.381))
+  (fp_line (start -18.415 -0.508) (end 18.415 -0.508) (layer F.SilkS) (width 0.381))
+  (fp_line (start -12.573 -9.017) (end 12.573 -9.017) (layer F.SilkS) (width 0.381))
+  (fp_line (start -12.065 9.017) (end 12.065 9.017) (layer F.SilkS) (width 0.381))
+  (fp_line (start 12.065 9.017) (end 12.065 2.54) (layer F.SilkS) (width 0.381))
+  (fp_line (start -12.065 9.017) (end -12.065 2.54) (layer F.SilkS) (width 0.381))
+  (fp_line (start -18.415 2.54) (end 18.415 2.54) (layer F.SilkS) (width 0.381))
+  (pad "" thru_hole circle (at 15.11046 -3.302) (size 3.50012 3.50012) (drill 1.89992) (layers *.Cu *.Mask))
+  (pad 3 thru_hole circle (at -5.715 -7.112) (size 1.30048 1.30048) (drill 0.8001) (layers *.Cu *.Mask))
+  (pad 2 thru_hole circle (at -7.62 -7.112) (size 1.30048 1.30048) (drill 0.8001) (layers *.Cu *.Mask))
+  (pad 1 thru_hole circle (at -9.525 -7.112) (size 1.30048 1.30048) (drill 0.8001) (layers *.Cu *.Mask))
+  (pad 4 thru_hole circle (at -3.81 -7.112) (size 1.30048 1.30048) (drill 0.8001) (layers *.Cu *.Mask))
+  (pad 5 thru_hole circle (at -1.905 -7.112) (size 1.30048 1.30048) (drill 0.8001) (layers *.Cu *.Mask))
+  (pad 9 thru_hole circle (at -9.525 -5.207) (size 1.30048 1.30048) (drill 0.8001) (layers *.Cu *.Mask))
+  (pad 7 thru_hole circle (at 1.905 -7.112) (size 1.30048 1.30048) (drill 0.8001) (layers *.Cu *.Mask))
+  (pad 6 thru_hole circle (at 0 -7.112) (size 1.30048 1.30048) (drill 0.8001) (layers *.Cu *.Mask))
+  (pad "" thru_hole circle (at -15.11046 -3.302) (size 3.50012 3.50012) (drill 1.89992) (layers *.Cu *.Mask))
+  (pad 10 thru_hole circle (at -7.62 -5.207) (size 1.30048 1.30048) (drill 0.8001) (layers *.Cu *.Mask))
+  (pad 11 thru_hole circle (at -5.715 -5.207) (size 1.30048 1.30048) (drill 0.8001) (layers *.Cu *.Mask))
+  (pad 12 thru_hole circle (at -3.81 -5.207) (size 1.30048 1.30048) (drill 0.8001) (layers *.Cu *.Mask))
+  (pad 13 thru_hole circle (at -1.905 -5.207) (size 1.30048 1.30048) (drill 0.8001) (layers *.Cu *.Mask))
+  (pad 14 thru_hole circle (at 0 -5.207) (size 1.30048 1.30048) (drill 0.8001) (layers *.Cu *.Mask))
+  (pad 15 thru_hole circle (at 1.905 -5.207) (size 1.30048 1.30048) (drill 0.8001) (layers *.Cu *.Mask))
+  (pad 16 thru_hole circle (at 3.81 -5.207) (size 1.30048 1.30048) (drill 0.8001) (layers *.Cu *.Mask))
+  (pad 17 thru_hole circle (at -9.525 -3.302) (size 1.30048 1.30048) (drill 0.8001) (layers *.Cu *.Mask))
+  (pad 18 thru_hole circle (at -7.62 -3.302) (size 1.30048 1.30048) (drill 0.8001) (layers *.Cu *.Mask))
+  (pad 19 thru_hole circle (at -5.715 -3.302) (size 1.30048 1.30048) (drill 0.8001) (layers *.Cu *.Mask))
+  (pad 20 thru_hole circle (at -3.81 -3.302) (size 1.30048 1.30048) (drill 0.8001) (layers *.Cu *.Mask))
+  (pad 21 thru_hole circle (at -1.905 -3.302) (size 1.30048 1.30048) (drill 0.8001) (layers *.Cu *.Mask))
+  (pad 22 thru_hole circle (at 0 -3.302) (size 1.30048 1.30048) (drill 0.8001) (layers *.Cu *.Mask))
+  (pad 23 thru_hole circle (at 1.905 -3.302) (size 1.30048 1.30048) (drill 0.8001) (layers *.Cu *.Mask))
+  (pad 24 thru_hole circle (at 3.81 -3.302) (size 1.30048 1.30048) (drill 0.8001) (layers *.Cu *.Mask))
+  (pad 8 thru_hole circle (at 3.81 -7.112) (size 1.30048 1.30048) (drill 0.8001) (layers *.Cu *.Mask))
+  (pad C2 thru_hole circle (at 9.525 -6.477) (size 1.30048 1.30048) (drill 0.8001) (layers *.Cu *.Mask))
+  (pad C1 thru_hole circle (at 6.985 -6.477) (size 1.30048 1.30048) (drill 0.8001) (layers *.Cu *.Mask))
+  (pad C3 thru_hole circle (at 6.985 -3.937) (size 1.30048 1.30048) (drill 0.8001) (layers *.Cu *.Mask))
+  (pad C4 thru_hole circle (at 9.525 -3.937) (size 1.30048 1.30048) (drill 0.8001) (layers *.Cu *.Mask))
+  (pad C5 thru_hole circle (at 8.255 -7.747) (size 1.30048 1.30048) (drill 0.8001) (layers *.Cu *.Mask))
+  (pad C5 thru_hole circle (at 8.255 -2.667) (size 1.30048 1.30048) (drill 0.8001) (layers *.Cu *.Mask))
+  (pad "" np_thru_hole circle (at -9.525 -0.00254) (size 1.99898 1.99898) (drill 1.99898) (layers *.Cu))
+  (pad "" np_thru_hole circle (at 9.525 -0.00254) (size 1.99898 1.99898) (drill 1.99898) (layers *.Cu))
+  (model walter/conn_pc/dvi.wrl
+    (at (xyz 0 0 0))
+    (scale (xyz 1 1 1))
+    (rotate (xyz 0 0 0))
+  )
+)
--- a/dvi_in.sch
+++ b/dvi_in.sch
--- a/dvi_out.sch
+++ b/dvi_out.sch
--- a/5
+++ b/5
@@ -0,0 +1,5 @@
+(fp_lib_table
+  (lib (name smd)(type KiCad)(uri /home/mari/projects/pcb/shimattapcblibs/footprints/pretty/smd.pretty)(options "")(descr ""))
+  (lib (name dvi)(type KiCad)(uri "$(KIPRJMOD)/dvi.pretty")(options "")(descr ""))
+  (lib (name artwork)(type KiCad)(uri /home/mari/projects/pcb/shimattapcblibs/footprints/pretty/artwork.pretty)(options "")(descr ""))
+)
--- a/fpga.sch
+++ b/fpga.sch
--- a/power.sch
+++ b/power.sch
@@ -51,21 +51,21 @@ Comment3 ""
 Comment4 ""
 $EndDescr
 $Comp
-L LD1117S12CTR U?
+L LD1117S12CTR U203
 U 1 1 5839A496
 P 5300 1100
-F 0 "U?" H 5300 1508 50  0000 C CNN
+F 0 "U203" H 5300 1508 50  0000 C CNN
 F 1 "LD1117S12CTR" H 5300 1417 50  0000 C CNN
-F 2 "SOT-223" H 5300 1326 50  0000 C CNN
+F 2 "TO_SOT_Packages_SMD:SOT-223" H 5300 1326 50  0001 C CNN
 F 3 "" H 5300 1100 50  0000 C CNN
 	1    5300 1100
 	1    0    0    -1  
 $EndComp
 $Comp
-L +1V2 #PWR02
+L +1V2 #PWR04
 U 1 1 5839A606
 P 5800 950
-F 0 "#PWR02" H 5800 800 50  0001 C CNN
+F 0 "#PWR04" H 5800 800 50  0001 C CNN
 F 1 "+1V2" H 5815 1123 50  0000 C CNN
 F 2 "" H 5800 950 50  0000 C CNN
 F 3 "" H 5800 950 50  0000 C CNN
@@ -73,32 +73,32 @@ F 3 "" H 5800 950 50  0000 C CNN
 	1    0    0    -1  
 $EndComp
 $Comp
-L CP C?
+L CP C211
 U 1 1 5839A62D
 P 6300 1200
-F 0 "C?" H 6418 1246 50  0000 L CNN
+F 0 "C211" H 6418 1246 50  0000 L CNN
 F 1 "10u" H 6418 1155 50  0000 L CNN
-F 2 "" H 6338 1050 50  0000 C CNN
+F 2 "Capacitors_SMD:C_0805_HandSoldering" H 6338 1050 50  0001 C CNN
 F 3 "" H 6300 1200 50  0000 C CNN
 	1    6300 1200
 	1    0    0    -1  
 $EndComp
 $Comp
-L C C?
+L C C210
 U 1 1 5839A663
 P 5800 1200
-F 0 "C?" H 5915 1246 50  0000 L CNN
+F 0 "C210" H 5915 1246 50  0000 L CNN
 F 1 "100n" H 5915 1155 50  0000 L CNN
-F 2 "" H 5838 1050 50  0000 C CNN
+F 2 "Capacitors_SMD:C_0603_HandSoldering" H 5838 1050 50  0001 C CNN
 F 3 "" H 5800 1200 50  0000 C CNN
 	1    5800 1200
 	1    0    0    -1  
 $EndComp
 $Comp
-L GND #PWR03
+L GND #PWR05
 U 1 1 5839A6C5
 P 5800 1650
-F 0 "#PWR03" H 5800 1400 50  0001 C CNN
+F 0 "#PWR05" H 5800 1400 50  0001 C CNN
 F 1 "GND" H 5805 1477 50  0000 C CNN
 F 2 "" H 5800 1650 50  0000 C CNN
 F 3 "" H 5800 1650 50  0000 C CNN
@@ -106,10 +106,10 @@ F 3 "" H 5800 1650 50  0000 C CNN
 	1    0    0    -1  
 $EndComp
 $Comp
-L GND #PWR04
+L GND #PWR06
 U 1 1 5839A6F3
 P 6300 1650
-F 0 "#PWR04" H 6300 1400 50  0001 C CNN
+F 0 "#PWR06" H 6300 1400 50  0001 C CNN
 F 1 "GND" H 6305 1477 50  0000 C CNN
 F 2 "" H 6300 1650 50  0000 C CNN
 F 3 "" H 6300 1650 50  0000 C CNN
@@ -117,10 +117,10 @@ F 3 "" H 6300 1650 50  0000 C CNN
 	1    0    0    -1  
 $EndComp
 $Comp
-L GND #PWR05
+L GND #PWR07
 U 1 1 5839A707
 P 5300 1650
-F 0 "#PWR05" H 5300 1400 50  0001 C CNN
+F 0 "#PWR07" H 5300 1400 50  0001 C CNN
 F 1 "GND" H 5305 1477 50  0000 C CNN
 F 2 "" H 5300 1650 50  0000 C CNN
 F 3 "" H 5300 1650 50  0000 C CNN
@@ -128,10 +128,10 @@ F 3 "" H 5300 1650 50  0000 C CNN
 	1    0    0    -1  
 $EndComp
 $Comp
-L +3V3 #PWR06
+L +3V3 #PWR08
 U 1 1 5839A7F3
 P 4550 950
-F 0 "#PWR06" H 4550 800 50  0001 C CNN
+F 0 "#PWR08" H 4550 800 50  0001 C CNN
 F 1 "+3V3" H 4565 1123 50  0000 C CNN
 F 2 "" H 4550 950 50  0000 C CNN
 F 3 "" H 4550 950 50  0000 C CNN
@@ -139,21 +139,21 @@ F 3 "" H 4550 950 50  0000 C CNN
 	1    0    0    -1  
 $EndComp
 $Comp
-L C C?
+L C C209
 U 1 1 5839A82D
 P 4700 1200
-F 0 "C?" H 4815 1246 50  0000 L CNN
+F 0 "C209" H 4815 1246 50  0000 L CNN
 F 1 "100n" H 4815 1155 50  0000 L CNN
-F 2 "" H 4738 1050 50  0000 C CNN
+F 2 "Capacitors_SMD:C_0603_HandSoldering" H 4738 1050 50  0001 C CNN
 F 3 "" H 4700 1200 50  0000 C CNN
 	1    4700 1200
 	1    0    0    -1  
 $EndComp
 $Comp
-L GND #PWR07
+L GND #PWR09
 U 1 1 5839A8AF
 P 4700 1650
-F 0 "#PWR07" H 4700 1400 50  0001 C CNN
+F 0 "#PWR09" H 4700 1400 50  0001 C CNN
 F 1 "GND" H 4705 1477 50  0000 C CNN
 F 2 "" H 4700 1650 50  0000 C CNN
 F 3 "" H 4700 1650 50  0000 C CNN
@@ -161,32 +161,32 @@ F 3 "" H 4700 1650 50  0000 C CNN
 	1    0    0    -1  
 $EndComp
 $Comp
-L LM2596 U?
+L LM2596 U201
 U 1 1 5839C4BC
 P 2350 1050
-F 0 "U?" H 2350 1537 60  0000 C CNN
+F 0 "U201" H 2350 1537 60  0000 C CNN
 F 1 "LM2596-3.3" H 2350 1431 60  0000 C CNN
-F 2 "" H 2300 1250 60  0000 C CNN
+F 2 "TO_SOT_Packages_SMD:TO-263-5Lead" H 2300 1250 60  0001 C CNN
 F 3 "" H 2300 1250 60  0000 C CNN
 	1    2350 1050
 	1    0    0    -1  
 $EndComp
 $Comp
-L L L?
+L L L202
 U 1 1 5839C78F
 P 3150 1050
-F 0 "L?" V 3340 1050 50  0000 C CNN
+F 0 "L202" V 3340 1050 50  0000 C CNN
 F 1 "33u" V 3249 1050 50  0000 C CNN
-F 2 "" H 3150 1050 50  0000 C CNN
+F 2 "smd:LPISM-13x9.55" H 3150 1050 50  0001 C CNN
 F 3 "" H 3150 1050 50  0000 C CNN
 	1    3150 1050
 	0    -1   -1   0   
 $EndComp
 $Comp
-L GND #PWR08
+L GND #PWR010
 U 1 1 5839C9F6
 P 2200 1650
-F 0 "#PWR08" H 2200 1400 50  0001 C CNN
+F 0 "#PWR010" H 2200 1400 50  0001 C CNN
 F 1 "GND" H 2205 1477 50  0000 C CNN
 F 2 "" H 2200 1650 50  0000 C CNN
 F 3 "" H 2200 1650 50  0000 C CNN
@@ -194,10 +194,10 @@ F 3 "" H 2200 1650 50  0000 C CNN
 	1    0    0    -1  
 $EndComp
 $Comp
-L GND #PWR09
+L GND #PWR011
 U 1 1 5839CA91
 P 2550 1650
-F 0 "#PWR09" H 2550 1400 50  0001 C CNN
+F 0 "#PWR011" H 2550 1400 50  0001 C CNN
 F 1 "GND" H 2555 1477 50  0000 C CNN
 F 2 "" H 2550 1650 50  0000 C CNN
 F 3 "" H 2550 1650 50  0000 C CNN
@@ -205,10 +205,10 @@ F 3 "" H 2550 1650 50  0000 C CNN
 	1    0    0    -1  
 $EndComp
 $Comp
-L +3V3 #PWR010
+L +3V3 #PWR012
 U 1 1 5839CAE0
 P 3400 850
-F 0 "#PWR010" H 3400 700 50  0001 C CNN
+F 0 "#PWR012" H 3400 700 50  0001 C CNN
 F 1 "+3V3" H 3415 1023 50  0000 C CNN
 F 2 "" H 3400 850 50  0000 C CNN
 F 3 "" H 3400 850 50  0000 C CNN
@@ -216,32 +216,32 @@ F 3 "" H 3400 850 50  0000 C CNN
 	1    0    0    -1  
 $EndComp
 $Comp
-L C C?
+L C C206
 U 1 1 5839CB13
 P 3400 1200
-F 0 "C?" H 3285 1154 50  0000 R CNN
+F 0 "C206" H 3285 1154 50  0000 R CNN
 F 1 "100n" H 3285 1245 50  0000 R CNN
-F 2 "" H 3438 1050 50  0000 C CNN
+F 2 "Capacitors_SMD:C_0603_HandSoldering" H 3438 1050 50  0001 C CNN
 F 3 "" H 3400 1200 50  0000 C CNN
 	1    3400 1200
 	1    0    0    1   
 $EndComp
 $Comp
-L CP C?
+L CP C207
 U 1 1 5839CB5E
 P 3750 1200
-F 0 "C?" H 3868 1246 50  0000 L CNN
+F 0 "C207" H 3868 1246 50  0000 L CNN
 F 1 "100u" H 3868 1155 50  0000 L CNN
-F 2 "" H 3788 1050 50  0000 C CNN
+F 2 "Capacitors_Tantalum_SMD:Tantalum_Case-D_EIA-7343-31_Hand" H 3788 1050 50  0001 C CNN
 F 3 "" H 3750 1200 50  0000 C CNN
 	1    3750 1200
 	1    0    0    -1  
 $EndComp
 $Comp
-L GND #PWR011
+L GND #PWR013
 U 1 1 5839CC14
 P 3400 1650
-F 0 "#PWR011" H 3400 1400 50  0001 C CNN
+F 0 "#PWR013" H 3400 1400 50  0001 C CNN
 F 1 "GND" H 3405 1477 50  0000 C CNN
 F 2 "" H 3400 1650 50  0000 C CNN
 F 3 "" H 3400 1650 50  0000 C CNN
@@ -249,10 +249,10 @@ F 3 "" H 3400 1650 50  0000 C CNN
 	1    0    0    -1  
 $EndComp
 $Comp
-L GND #PWR012
+L GND #PWR014
 U 1 1 5839CC37
 P 3750 1650
-F 0 "#PWR012" H 3750 1400 50  0001 C CNN
+F 0 "#PWR014" H 3750 1400 50  0001 C CNN
 F 1 "GND" H 3755 1477 50  0000 C CNN
 F 2 "" H 3750 1650 50  0000 C CNN
 F 3 "" H 3750 1650 50  0000 C CNN
@@ -260,32 +260,32 @@ F 3 "" H 3750 1650 50  0000 C CNN
 	1    0    0    -1  
 $EndComp
 $Comp
-L C C?
+L C C202
 U 1 1 5839CF57
 P 1800 1100
-F 0 "C?" H 1685 1054 50  0000 R CNN
+F 0 "C202" H 1685 1054 50  0000 R CNN
 F 1 "100n" H 1685 1145 50  0000 R CNN
-F 2 "" H 1838 950 50  0000 C CNN
+F 2 "Capacitors_SMD:C_0603_HandSoldering" H 1838 950 50  0001 C CNN
 F 3 "" H 1800 1100 50  0000 C CNN
 	1    1800 1100
 	1    0    0    1   
 $EndComp
 $Comp
-L CP C?
+L CP C201
 U 1 1 5839CFD0
 P 1350 1100
-F 0 "C?" H 1468 1146 50  0000 L CNN
+F 0 "C201" H 1468 1146 50  0000 L CNN
 F 1 "100u" H 1468 1055 50  0000 L CNN
-F 2 "" H 1388 950 50  0000 C CNN
+F 2 "Capacitors_Tantalum_SMD:Tantalum_Case-D_EIA-7343-31_Hand" H 1388 950 50  0001 C CNN
 F 3 "" H 1350 1100 50  0000 C CNN
 	1    1350 1100
 	-1   0    0    -1  
 $EndComp
 $Comp
-L GND #PWR013
+L GND #PWR015
 U 1 1 5839D0EB
 P 1800 1650
-F 0 "#PWR013" H 1800 1400 50  0001 C CNN
+F 0 "#PWR015" H 1800 1400 50  0001 C CNN
 F 1 "GND" H 1805 1477 50  0000 C CNN
 F 2 "" H 1800 1650 50  0000 C CNN
 F 3 "" H 1800 1650 50  0000 C CNN
@@ -293,10 +293,10 @@ F 3 "" H 1800 1650 50  0000 C CNN
 	1    0    0    -1  
 $EndComp
 $Comp
-L GND #PWR014
+L GND #PWR016
 U 1 1 5839D114
 P 1350 1650
-F 0 "#PWR014" H 1350 1400 50  0001 C CNN
+F 0 "#PWR016" H 1350 1400 50  0001 C CNN
 F 1 "GND" H 1355 1477 50  0000 C CNN
 F 2 "" H 1350 1650 50  0000 C CNN
 F 3 "" H 1350 1650 50  0000 C CNN
@@ -304,21 +304,21 @@ F 3 "" H 1350 1650 50  0000 C CNN
 	1    0    0    -1  
 $EndComp
 $Comp
-L D_Schottky D?
+L D_Schottky D201
 U 1 1 5839D707
 P 2900 1200
-F 0 "D?" V 2850 1300 50  0000 L CNN
+F 0 "D201" V 2850 1300 50  0000 L CNN
 F 1 "D_Schottky" V 3050 1200 50  0000 L CNN
-F 2 "" H 2900 1200 50  0000 C CNN
+F 2 "Diodes_SMD:SOD-123" H 2900 1200 50  0001 C CNN
 F 3 "" H 2900 1200 50  0000 C CNN
 	1    2900 1200
 	0    1    1    0   
 $EndComp
 $Comp
-L GND #PWR015
+L GND #PWR017
 U 1 1 5839D866
 P 2900 1650
-F 0 "#PWR015" H 2900 1400 50  0001 C CNN
+F 0 "#PWR017" H 2900 1400 50  0001 C CNN
 F 1 "GND" H 2905 1477 50  0000 C CNN
 F 2 "" H 2900 1650 50  0000 C CNN
 F 3 "" H 2900 1650 50  0000 C CNN
@@ -350,7 +350,7 @@ Wire Wire Line
 Wire Wire Line
 	2550 1550 2550 1650
 Wire Wire Line
-	2850 850  3400 850 
+	2850 850  3500 850 
 Wire Wire Line
 	3400 850  3400 1050
 Wire Wire Line
@@ -360,8 +360,6 @@ Wire Wire Line
 	3750 1350 3750 1650
 Wire Wire Line
 	3400 1350 3400 1650
-Wire Wire Line
-	800  950  1850 950 
 Connection ~ 1350 950 
 Connection ~ 1800 950 
 Wire Wire Line
@@ -372,10 +370,10 @@ Wire Wire Line
 	2900 1650 2900 1350
 Connection ~ 2900 1050
 $Comp
-L AP111725 U?
+L AP111725 U202
 U 1 1 583A0EAE
 P 2350 2400
-F 0 "U?" H 2350 2767 50  0000 C CNN
+F 0 "U202" H 2350 2767 50  0000 C CNN
 F 1 "AP111725" H 2350 2676 50  0000 C CNN
 F 2 "TO_SOT_Packages_SMD:SOT-223" H 2350 2050 50  0001 C CNN
 F 3 "" H 2450 2150 50  0000 C CNN
@@ -383,21 +381,16 @@ F 3 "" H 2450 2150 50  0000 C CNN
 	1    0    0    -1  
 $EndComp
 $Comp
-L GND #PWR016
+L GND #PWR018
 U 1 1 583A0FD0
 P 2350 2850
-F 0 "#PWR016" H 2350 2600 50  0001 C CNN
+F 0 "#PWR018" H 2350 2600 50  0001 C CNN
 F 1 "GND" H 2355 2677 50  0000 C CNN
 F 2 "" H 2350 2850 50  0000 C CNN
 F 3 "" H 2350 2850 50  0000 C CNN
 	1    2350 2850
 	1    0    0    -1  
 $EndComp
-Wire Wire Line
-	900  2400 900  950 
-Connection ~ 900  950 
-Wire Wire Line
-	900  2400 2050 2400
 Wire Wire Line
 	2350 2700 2350 2850
 Wire Wire Line
@@ -405,23 +398,23 @@ Wire Wire Line
 Wire Wire Line
 	3350 2400 3350 2250
 $Comp
-L C C?
+L C C204
 U 1 1 583A12DF
 P 2950 2550
-F 0 "C?" H 3065 2596 50  0000 L CNN
+F 0 "C204" H 3065 2596 50  0000 L CNN
 F 1 "100n" H 3065 2505 50  0000 L CNN
-F 2 "" H 2988 2400 50  0000 C CNN
+F 2 "Capacitors_SMD:C_0603_HandSoldering" H 2988 2400 50  0001 C CNN
 F 3 "" H 2950 2550 50  0000 C CNN
 	1    2950 2550
 	-1   0    0    -1  
 $EndComp
 $Comp
-L C C?
+L C C203
 U 1 1 583A1362
 P 1850 2550
-F 0 "C?" H 1965 2596 50  0000 L CNN
+F 0 "C203" H 1965 2596 50  0000 L CNN
 F 1 "100n" H 1965 2505 50  0000 L CNN
-F 2 "" H 1888 2400 50  0000 C CNN
+F 2 "Capacitors_SMD:C_0603_HandSoldering" H 1888 2400 50  0001 C CNN
 F 3 "" H 1850 2550 50  0000 C CNN
 	1    1850 2550
 	-1   0    0    -1  
@@ -434,12 +427,12 @@ Connection ~ 2350 2800
 Wire Wire Line
 	2950 2800 2950 2700
 $Comp
-L CP C?
+L CP C205
 U 1 1 583A189E
 P 3200 2550
-F 0 "C?" H 3318 2596 50  0000 L CNN
+F 0 "C205" H 3318 2596 50  0000 L CNN
 F 1 "10u" H 3318 2505 50  0000 L CNN
-F 2 "" H 3238 2400 50  0000 C CNN
+F 2 "Capacitors_SMD:C_0805_HandSoldering" H 3238 2400 50  0001 C CNN
 F 3 "" H 3200 2550 50  0000 C CNN
 	1    3200 2550
 	1    0    0    -1  
@@ -450,10 +443,10 @@ Connection ~ 2950 2800
 Connection ~ 2950 2400
 Connection ~ 3200 2400
 $Comp
-L +2V5 #PWR017
+L +2V5 #PWR019
 U 1 1 583A19FC
 P 3350 2250
-F 0 "#PWR017" H 3350 2100 50  0001 C CNN
+F 0 "#PWR019" H 3350 2100 50  0001 C CNN
 F 1 "+2V5" H 3365 2423 50  0000 C CNN
 F 2 "" H 3350 2250 50  0000 C CNN
 F 3 "" H 3350 2250 50  0000 C CNN
@@ -473,12 +466,12 @@ Wire Notes Line
 Text Notes 2650 3100 0    60   ~ 0
 PLL Analog Voltage
 $Comp
-L CP C?
+L CP C208
 U 1 1 583B5E87
 P 4150 1200
-F 0 "C?" H 4268 1246 50  0000 L CNN
+F 0 "C208" H 4268 1246 50  0000 L CNN
 F 1 "10u" H 4268 1155 50  0000 L CNN
-F 2 "" H 4188 1050 50  0000 C CNN
+F 2 "Capacitors_SMD:C_0805_HandSoldering" H 4188 1050 50  0001 C CNN
 F 3 "" H 4150 1200 50  0000 C CNN
 	1    4150 1200
 	1    0    0    -1  
@@ -489,4 +482,67 @@ Wire Wire Line
 	4150 1450 3750 1450
 Connection ~ 3750 1450
 Connection ~ 3750 1050
+$Comp
+L LED D202
+U 1 1 5848CA5A
+P 4000 850
+F 0 "D202" H 3992 595 50  0000 C CNN
+F 1 "LED-G" H 3992 686 50  0000 C CNN
+F 2 "LEDs:LED_0805" H 4000 850 50  0001 C CNN
+F 3 "" H 4000 850 50  0000 C CNN
+	1    4000 850 
+	-1   0    0    1   
+$EndComp
+$Comp
+L R R201
+U 1 1 5848CDB8
+P 3650 850
+F 0 "R201" V 3443 850 50  0000 C CNN
+F 1 "86" V 3534 850 50  0000 C CNN
+F 2 "Resistors_SMD:R_0603_HandSoldering" V 3580 850 50  0001 C CNN
+F 3 "" H 3650 850 50  0000 C CNN
+	1    3650 850 
+	0    1    1    0   
+$EndComp
+Connection ~ 3400 850 
+Wire Wire Line
+	3800 850  3850 850 
+Wire Wire Line
+	4150 850  4250 850 
+$Comp
+L GND #PWR020
+U 1 1 5848CFDB
+P 4250 850
+F 0 "#PWR020" H 4250 600 50  0001 C CNN
+F 1 "GND" H 4255 677 50  0000 C CNN
+F 2 "" H 4250 850 50  0000 C CNN
+F 3 "" H 4250 850 50  0000 C CNN
+	1    4250 850 
+	1    0    0    -1  
+$EndComp
+$Comp
+L L_Small L201
+U 1 1 584D4385
+P 1600 950
+F 0 "L201" V 1785 950 50  0000 C CNN
+F 1 "742792651" V 1694 950 50  0000 C CNN
+F 2 "Resistors_SMD:R_0603_HandSoldering" H 1600 950 50  0001 C CNN
+F 3 "" H 1600 950 50  0000 C CNN
+	1    1600 950 
+	0    -1   -1   0   
+$EndComp
+Wire Wire Line
+	800  950  1500 950 
+Wire Wire Line
+	1700 950  1850 950 
+Connection ~ 1850 2400
+Wire Wire Line
+	1850 2400 2050 2400
+Wire Wire Line
+	1850 2000 1850 2400
+Wire Wire Line
+	1000 2000 1850 2000
+Wire Wire Line
+	1000 2000 1000 950 
+Connection ~ 1000 950 
 $EndSCHEMATC
Author	SHA1	Message	Date
Mario Hüttel	a2f2ddae38	fixed footprints (added soldermask), increased clearance of copper pour on top and bottom	2017-01-11 21:14:27 +01:00
Mario Hüttel	b4d73d8834	improved pcb	2017-01-11 19:53:08 +01:00
Mario Hüttel	027cc8c141	removed resistors for configuration, reannotated whole schematic	2017-01-11 14:43:32 +01:00
Mario Hüttel	19ae8bce67	fixed msel pin bug	2017-01-11 10:49:59 +01:00
Mario Hüttel	2bd138ba01	added 3d model to footprint of power coil	2017-01-10 14:04:53 +01:00
Mario Hüttel	41e33910d6	added vias in power supply for TFP401	2017-01-08 21:59:38 +01:00
Mario Hüttel	9a04fc70b8	improved layout	2017-01-08 21:45:05 +01:00
Mario Hüttel	202c925e6e	redone switching regulator	2017-01-08 21:31:00 +01:00
Mario Hüttel	65db531300	removed track	2017-01-08 14:01:30 +01:00
Mario Hüttel	4d9c0971b2	added version number to pcb	2017-01-08 13:58:48 +01:00
Mario Hüttel	8561e71ad7	remove 5V output, increased input voltage to 9V+ because regulator is not stable with 5V in	2017-01-08 13:57:38 +01:00
Mario Hüttel	f45251d2d0	added cap in PVDD/OVDD of TFP401	2017-01-07 00:20:38 +01:00
Mario Hüttel	181ea5802a	moved input cap to bottom layer, improve routing of +2V5	2017-01-06 18:13:02 +01:00
Mario Hüttel	7e5fce5379	moved footprints, checked silkscreen positions, reinforced some power tracks	2017-01-06 16:29:37 +01:00
Mario Hüttel	23596b6827	improved layout	2017-01-05 23:21:58 +01:00
Mario Hüttel	a163647422	exchanged ceramic caps with tantal	2017-01-05 21:41:36 +01:00
Mario Hüttel	ad263474a2	fixed GND connection of cap for regulator	2017-01-05 20:07:08 +01:00
Mario Hüttel	ab8a7ae856	fixed routing, moved caps to bottom layer, added caps for 5V rail	2017-01-04 21:32:46 +01:00
Mario Hüttel	716c1b88e5	fixed cap in VIO for FPGA, added project/my name and date	2017-01-04 03:07:54 +01:00
マリオ	9b88a8374f	fixed unconnected pin	2017-01-03 15:28:50 +01:00
Mario Hüttel	e92f1b571f	improve GND plane for switching regulator	2017-01-03 00:32:33 +01:00
Mario Hüttel	71dffbb622	fixed routing of some tracks	2017-01-02 21:39:35 +01:00
Mario Hüttel	91d4946fd7	fixed copper pour	2017-01-01 23:15:30 +01:00
Mario Hüttel	032c2f39c6	edited	2017-01-01 23:05:09 +01:00
Mario Hüttel	e1a0819a87	created gerber	2017-01-01 21:12:58 +01:00
Mario Hüttel	0a8f8143bf	added gerber files to gitignore	2017-01-01 20:45:27 +01:00
Mario Hüttel	84a264b12b	changed copper pur	2017-01-01 20:43:55 +01:00
Mario Hüttel	d94a5e72cb	added symbols, fixed silkscreen, last changes	2017-01-01 20:34:59 +01:00
Mario Hüttel	78cc0cddcd	edited polygons	2016-12-17 22:40:00 +01:00
Mario Hüttel	5395223a8b	edited layout	2016-12-13 20:55:46 +01:00
Mario Hüttel	684f9625ee	finished first draft	2016-12-13 20:25:47 +01:00
Mario Hüttel	8fd8d39297	layout, added cap in 3v3	2016-12-13 15:31:47 +01:00
Mario Hüttel	5dfb6d97ed	epcs fixed	2016-12-13 11:56:05 +01:00
Mario Hüttel	e20c479d28	changed schematic, routed	2016-12-13 11:47:49 +01:00
Mario Hüttel	0f1c797639	layouted supplies for fpga	2016-12-12 22:12:52 +01:00
Mario Hüttel	0caa103ee5	fixed schematic, routed foo	2016-12-12 21:04:51 +01:00
Mario Hüttel	2541362c90	GND routing	2016-12-12 19:26:53 +01:00
Mario Hüttel	7825d0ca32	fixed schematic errors, layouted power supply, fixed dvi in and out	2016-12-12 19:16:34 +01:00
Mario Hüttel	d239229656	fixed lengths, positioned dvi ports correctly	2016-12-12 11:23:06 +01:00
Mario Hüttel	66eda104d0	flipped chips, removed termination in DVI-out	2016-12-11 21:31:14 +01:00
Mario Hüttel	b733c4108e	flipped resistor arrays, started layout	2016-12-11 18:30:16 +01:00
Mario Hüttel	1ebe08323d	finished component association	2016-12-11 17:37:27 +01:00
Mario Hüttel	68374bbb30	unified rsistor array sizes, associated components	2016-12-10 16:58:19 +01:00
Mario Hüttel	4c4b95c8d3	changed transistors for level shifting, started footprint association	2016-12-09 21:21:27 +01:00
Mario Hüttel	df684d3788	annotated schematic	2016-12-09 20:32:01 +01:00
Mario Hüttel	200b8e1a0b	finished schematic	2016-12-09 20:28:56 +01:00
Mario Hüttel	f0479ce996	reduced txclock to single ended, connected power down	2016-12-07 20:29:10 +01:00
Mario Hüttel	124ed27ef7	toplevel connection DVI out, i2c level shifter	2016-12-07 17:40:21 +01:00
Mario Hüttel	522cee0947	moved things	2016-12-07 16:36:46 +01:00
Mario Hüttel	280f4e7cea	DVI out edited	2016-12-07 14:58:40 +01:00